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IEEE Transactions on Applied Superconductivity

Experimental implementation of SFQ NDRO cells and 8-bit ADC

V. K. Kaplunenko, M. Khabipov, D.Yu. Khokhlov, Alex F. Kirichenko, V. P. Koshelets, Sergey Kovtonyuk

Published Mar 1, 1993• 6 citations
Publisher

Abstract

Two single-flux quantum (SFQ) logic elements have been designed, fabricated, and successfully tested: an 8 b analog-to-digital converter (ADC) and nondestructive readout (NDRO) cells. The converter consists of an input coil, a comparator, and a reversible ripple counter. The ADC shows a good linearity (+or-12 mA) and a quite high calculated frequency range (up to 2.5 GHz). Two types of input coils differing in inductance and two types of NDRO units also have been investigated: with direct and magnetic coupling between interferometers. The integrated circuits are fabricated using 4 mu m Nb-AlO/sub x/-Nb trilayer technology with a critical current density of about 1000 A/cm. This techniques makes it possible to produce NDRO cells operating up to 10 GHz frequency.>

DOI
10.1109/77.233975

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Superconductor Science and Technology•Nov 21, 2001•6 citations
Two single-flux quantum (SFQ) logic elements have been designed, fabricated, and successfully tested: an 8 b analog-to-digital converter (ADC) and nondestructive readout (NDRO) cells. The converter consists of an input coil, a comparator, and a reversible ripple counter. The ADC shows a good linearity (+or-12 mA) and a quite high calculated frequency range (up to 2.5 GHz). Two types of input coils differing in inductance and two types of NDRO units also have been investigated: with direct and magnetic coupling between interferometers. The integrated circuits are fabricated using 4 mu m Nb-AlO/sub x/-Nb trilayer technology with a critical current density of about 1000 A/cm. This techniques makes it possible to produce NDRO cells operating up to 10 GHz frequency.>
A new A/D converter which includes a comparator, and a reversible binary counter with DC outputs has been designed, fabricated, and tested. The comparator generates two trains of the single-flux-quantum (SFQ) pulses in response to increasing or decreasing input signal. The pulses are transferred through SFQ transmission lines to the adding and diminishing inputs of a reversible counter. The reversible counter has been realized by supplementing the usual counter with the SFQ transmission lines, splitters; and confluence elements for sending diminished pulses directly to each bit. Nondestructive read-out of the counter contents is carried out by SFQ/DC converters connected to each counter bit. The integrated circuit is fabricated using 5- mu m Nb-AlO/sub x/-Nb Josephson junction technology with a critical current density about 500 A/cm/sup 2/. External Mo shunts of the junctions provide the value of beta /sub c/<or=1 and I/sub c/R approximately=300 mu V. The A/D conversion is studied for low-frequency signals with an external clock. High-frequency performance of the reversible counter has been tested.
A new generation of the Josephson digital circuits-rapid single flux quantum (RSFQ) devices-based on overdamped externally shunted high quality Nb-AlO x -Nb tunnel junctions have been designed, fabricated and experimentally investigated. All-refractory material 11-layer 5 mu m integrated technology has been successfully employed for the preparation of the RSFQ microcircuits. The T flip-flop has been demonstrated to operate properly up to clock frequencies of 100 GHz at 25% margins. The proper operation of the buffer stage for a one-directional SFQ pulse transmission at clock frequencies up to 125 GHz has been achieved. The possibilities to convert the information from the usual DC form to SFQ and vice versa have been demonstrated. An output signal in an SFQ/DC converter as high as 220 mu V has been measured. A new counter type A/D converter which includes a comparator and reversible binary counter with DC outputs has been fabricated and tested. The proposed ADC seems to be very promising for high-accuracy measurement of medium-bandwidth signals. The possibilities of creating a number of SFQ devices with outstanding parameters are discussed.
We have designed a fully integrated 5-bit flash-type single-flux quantum (SFQ) analog-to-digital converter (ADC), in which an error correction and a bit-interleaving circuit are integrated with complementary quasi-one-junction SQUID (CQOS) comparators, and we verified its operation in experiments. Two types of look-back error correction circuits with different clock schemes were designed for the integrated ADCs to avoid the gray zone in comparators and to convert gray code to binary code. The interleaving circuit was also used in the ADC to add one extra bit. A binary 5-bit A/D converter was integrated into an IC chip. Then, input waveforms at low frequencies were successfully retrieved from the binary data of the A/D converter without any errors. We also confirmed that the A/D converter operated properly by conducting tests in our cryocooling system using a 4K-GM cryocooler after the chip was flip-chip bonded onto a multi-chip-module (MCM) carrier. We also used the beat frequency method to test and confirm that the CQOS comparator operated effectively at high frequency, i.e., 3 bits at 15 GHz in the binary code operation and 4 bits at 15 GHz in the gray code operation. Furthermore, operations at sampling frequencies of up to 32 and 50 GHz with a low-frequency analog input signal were experimentally confirmed for a 4-bit comparator circuit with a critical current density Jcof 2.5 kA/cm2and 10 kA/cm2, respectively.
We have fabricated and measured high T/sub c/ superconductor single flux quantum 1-bit flux-counting analog-to-digital converters (ADCs). The ADCs were made with a multilayer all-epitaxial process which incorporates 10 edge SNS (superconductor-normal-superconductor) or step-edge grain boundary (SEGB) Josephson junctions with a YBa/sub 2/Cu/sub 3/O/sub 7-/spl delta// groundplane. The ADC consists of a quantizer connected to a Toggle flip-flop through a buffer-like stage. Direct readout of the flux state of the T flip-flop was made with a Read SQUID inductively coupled through a hole in the groundplane. The circuits were operated at 65 K and low speeds. The SNS circuits outperformed the SEGB circuits because of their higher readout voltages and tighter critical current spreads.
We have designed, fabricated, and tested a rapid single flux quantum (RSFQ) 1 bit arithmetic logic unit (ALU) block. The circuit consists of three DC current driven SFQ switches and a half-adder. We successfully tested the half-adder cell at clock frequency up to 20 GHz. The switches were commutating output ports of the half-adder to produce AND, OR, XOR, or ADD functions. For a high-speed test, we attached two switches at the input ports of the half-adder to control the high-speed input data by low-frequency pattern generators. The output in this measurement was an eye-diagram. Using this set-up, the circuit was successfully tested up to 20 GHz. The chip was fabricated using a standard HYPRES 1 kA cm −2 Nb Josephson junction fabrication process.
We are developing an analog-to-digital converter (ADC) based on rapid single-flux quantum technology for radio-astronomic spectroscopy applications where very wide bandwidth is required and relatively small resolution is sufficient. The ADC consists of periodic-flash comparators, a demultiplexer and output drivers; and is sufficiently simple to be implemented on a single chip using a conventional 2–3 μm Nb trilayer technology. A 2-bit ADC has been designed for operation at 16 GHz of the sampling frequency. All the subsystems of the ADC have been fabricated using standard 1.6 kA cm −2 Nb/AlO x /Nb technology and have been successfully tested.