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IEEE International Superconductive Electronics Conference (ISEC)

Noise reduction in RSFQ logic gates for increasing operating speed and widening margins

Yuma Kita, Matsuoka Hiromi, Shigeyuki Miyajima, Masamitsu Tanaka, Akira Fujimaki

Published Jul 1, 2013• 1 citation
Publisher

Abstract

We present a new design technique of rapid single-flux-quantum (RSFQ) logic gates for low-noise, high-speed operation. In this study, we propose the use of a damping resistor shared with a junction pair composing a comparator, in addition to their individual shunt resistors increased from the standard values. We analyzed timing characteristics and bit error rates (BERs) of several RSFQ flip-flops composed of the proposed comparators using numerical simulation. The proposed comparator showed reduced timing jitter by ~5% in association with small delay time, sharpened BER curves, and improvement in operating margins by 2-3% compared to the standard design. We fabricated 2-bit shift registers using the noise reduction technique. We obtained sharp BER curves from the measurement. The proposed method indicated that it gave wide margins.

DOI
10.1109/isec.2013.6604273

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We present a new design technique of rapid single-flux-quantum (RSFQ) logic gates for low-noise, high-speed operation. In this study, we propose the use of a damping resistor shared with a junction pair composing a comparator, in addition to their individual shunt resistors increased from the standard values. We analyzed timing characteristics and bit error rates (BERs) of several RSFQ flip-flops composed of the proposed comparators using numerical simulation. The proposed comparator showed reduced timing jitter by ~5% in association with small delay time, sharpened BER curves, and improvement in operating margins by 2-3% compared to the standard design. We fabricated 2-bit shift registers using the noise reduction technique. We obtained sharp BER curves from the measurement. The proposed method indicated that it gave wide margins.
We report experimental results of bit-error-rate (BER) measurements in small-critical-current or lowered-biasvoltage rapid single-flux-quantum (RSFQ) circuits for power reduction. In such reduced-power RSFQ circuits, the BERs can be increased because of the reduced signal-to-noise ratio. We fabricated 2-bit shift registers using a 2.5-kA/cm2niobium process, and measured BERs by low-frequency tests at 4.2 K. We obtained sufficiently wide bias margins when we reduced the critical currents in a range of 1/2 to 1/4 of the conventional design, while it narrowed as the critical currents reduced to 1/8. For low-voltage shift registers, the bias margins linearly decreased in width as bias voltages were lowered. We found that 0.25 mV, 1/10 of the conventional design, was a good bias voltage to balance competing power reduction and bias margin.
We report energy reduction in low-voltage rapid single-flux-quantum (LV-RSFQ) circuits using shunt-resistor-free Josephson junctions. The LV-RSFQ logic is one of energy-efficient derivatives of rapid single-flux-quantum (RSFQ) logic, which operates in a constant voltage mode. By lowering bias voltages, we can reduce power consumption at bias resistors which account for more than 90% of total power consumption, and also reduce the energy dynamically consumed during switching events because of slower transition of superconductor phase. Voltage drops across Josephson junctions cause a complicated trade-off between operation speed and power consumption. In this paper, we evaluated shunt-resistor-free LV-RSFQ shift-registers in terms of operation speed, power consumption, and energy-efficiency. Numerical simulation revealed their faster operation by up to 50% and accordingly higher energy-efficiency. Experimental results showed that a 0.5mV shift-register had superiority in operation speed and energy-efficiency.
We address the problem of reducing the noise of an RSFQ circuit, which may significantly decohere a Josephson qubit in the case of integration of these circuits. The main sources of such noise in traditional RSFQ circuits are low-ohmic shunting resistors ensuring sufficiently high damping. We developed the toggle flip-flop (TFF) cells with weakly-damped individual junctions due to high-ohmic shunts. The dominant part of necessary damping in this circuit was realized by applying an additional, so-called 'perpendicular', low-ohmic resistor connecting the centre of the storing TFF inductance to ground. The TFF circuits with junctions shunted by 50 Ω resistors and perpendicular resistor of 1.5 Ω, ensuring suppression of noise by more than one order, have been fabricated and demonstrated an operation range of ±20%. In order to make the circuit compact and, therefore, less sensitive to external noise, the passive frozen-flux-based phase shifting elements, replacing large quantizing inductances, were also included. The circuits were fabricated using PTB Nb trilayer process with critical current density j c = 100 A/cm 2 .
Reduced Probability of Noise Introduced Malfunction in RSFQ Circuits by Implementing Intrinsic π\piπ-Phaseshifter
The rapid single flux quantum electronics is characterized by a low switching energy, which makes it susceptible to noise introduced bit-errors. For industrial applications a certain noise immunity is required which is still a challenge especially for circuits of higher complexity. We analysed the influence of each individual resistor in a toggle flip-flop circuit to the overall bit-error rate. The shunt resistors of comparator structures are the dominant noise sources and bias resistors have almost no influence.
The Rapid Single Flux Quantum electronics is a superconducting, naturally digital circuit family which is currently close to getting commercially applied.RSFQ is outstanding by its very low switching energy resulting in a very low power consumption which is the reason for a significant influence on thermal noise.For industrial applications a certain noise immunity is required which is still a challenge especially for circuits of higher complexity.In superconducting electronics resistors are the only on-chip noise sources.We analyzed the influence of each individual resistor in a toggle Flip-Flop circuit to the overall bit-error rate.The shunt resistors of comparator structures are the dominant noise sources and bias resistors have almost no influence.We analyzed in detail the types of thermal introduced switching errors of an toggle Flip-Flop which was optimized with respect to the fabrication yield.Simulation studies were accomplished to investigate the influence of circuit parameters on quality and on quantity of switching errors.By identifying and manipulating the parameters with the most significant influence on the noise susceptibility an enhanced noise immunity of the device can be achieved.The goal is to improve the robustness of RSFQ circuits against the influence of thermal noise for an specific topology by changing the circuit parameters of the device.
All complex devices in rapid single flux quantum (RSFQ) technique work at much lower clock rates than possible for simple cells. New data driven self timed or asynchronous concepts can reduce this gap, but even in this case still a discrepancy between simulation and experiment is shown. It has been pointed out in previous studies, that the influence of thermal fluctuations in RSFQ circuits is divided into static and dynamic switching bit errors as well as timing jitter induced failures. The bit error rate depends exponentially on the temperature and is not the main issue in the low temperature technique. Our last results show for the first time, that the variance of the switching time is much slower decreased by reducing the temperature and is still important at 4.2 K. We describe a general method for calculating the switching time distribution for RSFQ cells. Furthermore, we present detailed results for a timing analysis of a dc/SFQ-converter. The delay between output signal and the input current ramp shows a variation over 1 ps which is more than 10% of the switching time itself. This new understanding of the background of timing jitter enables a goal-oriented improvement in the design process of RSFQ circuits.