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IEEE Transactions on Magnetics

Experimental study of the RSFQ logic elements

V. K. Kaplunenko, M. Khabipov, V. P. Koshelets, Konstantin K. Likharev, Oleg A. Mukhanov, Vasili K. Semenov, I. L. Serpuchenko, Alexander N. Vystavkin

Published Mar 1, 1989• 84 citations
Publisher

Abstract

New elements of the rapid single flux quantum (RSFQ) logic family have been designed, fabricated, and tested. All-Nb 14-layer 5 mu m technology using externally shunted tunnel junctions with j/sub c/=500 A/cm/sup 2/, I/sub c/R/sub s/=300 mu V, and B/sub c/>
DOI
10.1109/20.92422

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Several novel circuits of the rapid single-flux-quantum (RSFQ) family of Josephson-junction digital devices have been designed, fabricated using a 2.5- mu m 1000-A/cm/sup 2/ Nb trilayer technology, and tested at low frequencies. Numerical simulation and measurements have shown that these circuits have considerably wider parameter margins, due to application of several novel design methods. The authors have also carried out an experiment to measure the rate of errors in a simple RSFQ circuit including an inverter, confluence buffer, and Josephson transmission line. Near the middle of the parameter window at 4.2 K, the error probability was definitely lower than 3*10/sup -15/ per logic operation, despite experimentation with rudimentary shielding and filtering.>
A new generation of the Josephson digital circuits-rapid single flux quantum (RSFQ) devices-based on overdamped externally shunted high quality Nb-AlO x -Nb tunnel junctions have been designed, fabricated and experimentally investigated. All-refractory material 11-layer 5 mu m integrated technology has been successfully employed for the preparation of the RSFQ microcircuits. The T flip-flop has been demonstrated to operate properly up to clock frequencies of 100 GHz at 25% margins. The proper operation of the buffer stage for a one-directional SFQ pulse transmission at clock frequencies up to 125 GHz has been achieved. The possibilities to convert the information from the usual DC form to SFQ and vice versa have been demonstrated. An output signal in an SFQ/DC converter as high as 220 mu V has been measured. A new counter type A/D converter which includes a comparator and reversible binary counter with DC outputs has been fabricated and tested. The proposed ADC seems to be very promising for high-accuracy measurement of medium-bandwidth signals. The possibilities of creating a number of SFQ devices with outstanding parameters are discussed.
Rapid Single Flux Quantum (RSFQ) Josephson-junction technology is capable of processing digital data at sub-terahertz frequencies while dissipating almost negligible power. At the present time one can routinely simulate, optimize, design, manufacture, and test an elementary RSFQ logic/memory cell consisting of dozens of Josephson junctions. Furthermore, a number of relatively complex (few hundred to few thousand Josephson junctions) digital circuits were designed and successfully tested. Moreover we know how to implement several RSFQ systems (including analog-to-digital and digital-to-analog converters, digital SQUIDs for supersensitive magnetometry, and digital autocorrelator for radioastronomy) which would far outperform their currently available and even prospective semiconductor counterparts. In order to implement more complex RSFQ systems, including high-performance digital signal processors and general purpose computers there are a number of technical problems to solve. The issues include making full use of on-chip sub-terahertz processing in conditions when inter-chip data/clock exchange speed is bound by bandwidth of the order of a few Gbps/pin. I present the current know-how of the field, and formulate the questions that need to be solved before the RSFQ technology becomes a major workhorse of high-performance computation.
Superconducting circuits based upon Rapid Single Flux Quantum (RSFQ) Logic are an interesting approach for future digital electronics with clock frequencies in the range of 100 GHz. Our intention is to increase the integration density of such circuits. Therefore we have successfully fabricated and tested an RSFQ-circuit based on a new kind of stacked three terminal device, henceforth called a "stacktron". A stacktron consists of two vertically arranged all-niobium tunnel junctions, each separately shunted by a thin film resistor, and an access to the intermediate niobium layer. An RSFQ frequency divider (T-flip-flop) including two stacktrons has been tested up to 20 GHz. As a shunt resistor we used Pd/Au, so that /spl beta//sub c/<1 and the IV-curve is nonhysteretic. The junctions showed a current density of approximately 250 A/cm/sup 2/. The I/sub c/R/sub n/-product was 100 /spl mu/V. These first steps toward a three dimensional (3D) RSFQ architecture will be discussed in the framework of highly integrated and complex RSFQ-circuits.
We have developed integrated circuits in rapid single flux quantum (RSFQ) impulse logic based on intrinsically shunted tunnel junctions as the active circuit elements. The circuits have been fabricated using superconductor-insulator-normalconductor-insulator-superconductor (SINIS) multilayer technology. The paper presents experimental results of the operation of various RSFQ circuits realized in different designs and layouts. The circuits comprise dc/SFQ and SFQ/dc converters, Josephson transmission lines (JTLs), T-flipflops, and analog key components. Functionality has been proved; the circuits have been found to operate correctly in switching. The circuits investigated have a critical current density of j/sub C/=400 A/cm/sup 2/ and a characteristic voltage of V/sub C/=165 /spl mu/V, the area of the smallest junction is A=24 /spl mu/m/sup 2/. The junctions exhibit nearly hysteresis-free current-voltage characteristics (hysteresis: less than 7%), the intra-wafer parameter spread for j/sub C/ is below /spl plusmn/8%. The margins of the bias current I/sub b/ of the circuits have been experimentally determined and found to be larger than /spl plusmn/24%. At preset, constant values of I/sub b/, the range of a separate bias current I/sub bsw/ fed to a switching stage integrated between two segments of JTL's is fully covered by the operation margins which are larger than /spl plusmn/56%.