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IEEE Transactions on Applied Superconductivity

Experimental realization of a 3D integrated RSFQ T-flip-flop using stacktrons

Ben J. Ruck, R.W.A.H. Schmitz, Norbert Thyssen, Bernd Hermanns, H. Kohlstedt, Susanne Lomatch

Published Jun 1, 1999• 4 citations
Publisher

Abstract

Superconducting circuits based upon Rapid Single Flux Quantum (RSFQ) Logic are an interesting approach for future digital electronics with clock frequencies in the range of 100 GHz. Our intention is to increase the integration density of such circuits. Therefore we have successfully fabricated and tested an RSFQ-circuit based on a new kind of stacked three terminal device, henceforth called a "stacktron". A stacktron consists of two vertically arranged all-niobium tunnel junctions, each separately shunted by a thin film resistor, and an access to the intermediate niobium layer. An RSFQ frequency divider (T-flip-flop) including two stacktrons has been tested up to 20 GHz. As a shunt resistor we used Pd/Au, so that /spl beta//sub c/<1 and the IV-curve is nonhysteretic. The junctions showed a current density of approximately 250 A/cm/sup 2/. The I/sub c/R/sub n/-product was 100 /spl mu/V. These first steps toward a three dimensional (3D) RSFQ architecture will be discussed in the framework of highly integrated and complex RSFQ-circuits.

DOI
10.1109/77.783896

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IEEE Transactions on Applied Superconductivity•Jun 1, 1995•10 citations
Superconducting circuits based upon Rapid Single Flux Quantum (RSFQ) Logic are an interesting approach for future digital electronics with clock frequencies in the range of 100 GHz. Our intention is to increase the integration density of such circuits. Therefore we have successfully fabricated and tested an RSFQ-circuit based on a new kind of stacked three terminal device, henceforth called a "stacktron". A stacktron consists of two vertically arranged all-niobium tunnel junctions, each separately shunted by a thin film resistor, and an access to the intermediate niobium layer. An RSFQ frequency divider (T-flip-flop) including two stacktrons has been tested up to 20 GHz. As a shunt resistor we used Pd/Au, so that /spl beta//sub c/<1 and the IV-curve is nonhysteretic. The junctions showed a current density of approximately 250 A/cm/sup 2/. The I/sub c/R/sub n/-product was 100 /spl mu/V. These first steps toward a three dimensional (3D) RSFQ architecture will be discussed in the framework of highly integrated and complex RSFQ-circuits.
The paper presents the determination of the high-frequency performance of Rapid Single Flux Quantum (RSFQ) circuits fabricated in superconductor-insulator-normal metal-insulator-superconductor (SINIS) technology. Circuits of different designs have been realized and were experimentally investigated, including specially designed T flip-flop (TFF) structures and circuits consisting of a switch terminated in Josephson transmission lines. For TFF circuits, the operational functionality was investigated in the frequency range from dc up to nearly 200 GHz. Two frequency domains were found. In the first domain, ranging up to frequencies of 80 GHz (f/sub C//spl cong/Y/sub C///spl Phi//sub 0/), correct digital operation of the device was ascertained. Beyond this range a second domain was found, ranging to nearly 200 GHz, for which quasi-analog frequency dividing is assumed. The bias current margins are /spl plusmn/30% at 40 GHz and /spl plusmn/15% between 130 GHz and 200 GHz. For circuits consisting of a switch, the operational functionality was proved in the frequency range from dc up to 50 GHz, with bias current margins of more than /spl plusmn/20%. The critical current density of the circuits is j/sub C//spl cong/750 A/cm/sup 2/. The smallest junction area is about A=12 /spl mu/m/sup 2/, and the characteristic voltage is V/sub C/=170 /spl mu/V.
A simple test circuit of the rapid single-flux-quantum (RSFQ) logic family has been implemented in a planarized all-refractory technology using only two superconducting layers and small Nb/AlOx/Nb Josephson junctions (nominally 1.5×1.5 μm2) with critical current density jc≊6 kA/cm2. A special layout design of the integrated circuit (including a SFQ pulse generator, Josephson transmission line, and T flip–flop) was used to reduce 3D inductances resulting from absence of the ground plane. For samples with various junction parameters, the maximum frequency of the SFQ pulse train, which could be divided by 2 by the flip–flop, ranged from 200 to 370 GHz.
Rapid Single Flux Quantum (RSFQ) T-flip flops (TFFs) operating up to 770 GHz have been demonstrated at 4.2 K. The devices, consisting of either resistively shunted or unshunted Josephson junctions, are fabricated using a planarized Nb/AlO/sub x//Nb trilayer process. Electron beam lithography is used to pattern all levels with a minimum junction area less than 0.1 /spl mu/m/sup 2/. Critical current densities of 0.5 mA//spl mu/m/sup 2/ and 2.5 mA//spl mu/m/sup 2/ are used for the shunted (tested at 1.8 K) and unshunted devices (tested at 4.2 K) respectively. The input and output frequencies of the TFFs are obtained from the input and output voltages by the Josephson relation. The output voltage is exactly half of the input voltage when the divide-by-two operation is correct.
A new generation of the Josephson digital circuits-rapid single flux quantum (RSFQ) devices-based on overdamped externally shunted high quality Nb-AlO x -Nb tunnel junctions have been designed, fabricated and experimentally investigated. All-refractory material 11-layer 5 mu m integrated technology has been successfully employed for the preparation of the RSFQ microcircuits. The T flip-flop has been demonstrated to operate properly up to clock frequencies of 100 GHz at 25% margins. The proper operation of the buffer stage for a one-directional SFQ pulse transmission at clock frequencies up to 125 GHz has been achieved. The possibilities to convert the information from the usual DC form to SFQ and vice versa have been demonstrated. An output signal in an SFQ/DC converter as high as 220 mu V has been measured. A new counter type A/D converter which includes a comparator and reversible binary counter with DC outputs has been fabricated and tested. The proposed ADC seems to be very promising for high-accuracy measurement of medium-bandwidth signals. The possibilities of creating a number of SFQ devices with outstanding parameters are discussed.
The operational functionality of rapid-single-flux-quantum (RSFQ) T-flipflop circuits has been experimentally investigated in the frequency range from dc up to nearly three times the characteristic frequency . The operational range found is divided into two domains different in nature. In the first domain, ranging up to frequencies of 120 GHz , correct digital operation of the device has been found. Beyond this range a second domain has been found, ranging from about 200 GHz to nearly 350 GHz, in which quasi-analogous operation of frequency dividing is suggested. Typical bias current margins are in the first domain and in the second. The circuits have been fabricated using - Al/Nb trilayer technology with externally shunted Josephson tunnel junctions of critical current densities of and smallest areas of about . The characteristic voltage is and the McCumber parameter .
We suggest a new design of Rapid Single Flux Quantum (RSFQ) logic circuits which is based on a single superconducting layer and does not require a superconducting ground plane. The small inductances of about 10 pH, that are obligatory for the RSFQ applications, are formed as narrow slits with width comparable to the London penetration depth (/spl cong/0.15 /spl mu/m). The design allows us to decrease the geometric size of the RSFQ cell and can be applied to low-T/sub c/ circuits as well. Test circuits have been implemented using YBaCuO grain boundary junctions on assymmetric 32/spl deg/Y-ZrO/sub 2/ bi-crystals to measure the slit inductance per unit length and the mutual inductance of neighboring slits. A typical inductance of a 0.4 pm slit was determined to be 0.7pH//spl mu/m. We present a new design and a computer simulation of a flip-flop circuit based on these inductance measurements. To realize these circuits experimentally one needs at least two grain boundaries, separated by a distance of 10 to l5 /spl mu/m, or to use bi-epitaxial or step-edge junction technology.>