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IEEE Transactions on Magnetics

A direct coupled Josephson sampler concept with a vortex to vortex transition sampling pulse generator

Henrik Kratz, W. Jutzi

Published Mar 1, 1985• 5 citations
Publisher

Abstract

A Josephson sampler with direct resistive coupling between sampling gate and sampling pulse generator has been designed and simulated. The sampling gate and the sampling pulse generator comprise two Josephson junction interferometers. A short sampling pulse of 3ps width is generated at a suitable vortex to vortex transition. Delays up to 200ps between the sampling pulse and the main trigger input could be generated with an electronically adjustable circuit on the same chip. A layout of the complete sampling circuit, i.e. the sampling gate, the sampling pulse generator and the electronic delay circuit on a single 36mm2chip has been achieved for the Nb-NbxOy-PbInAu technology. The minimum line width is 8μm. Forj_{\max} = 3kA/cm2a time resolution of 3.5ps is predicted.

DOI
10.1109/tmag.1985.1063699

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SUB-PICOSECOND MEASUREMENT OF TIME INTERVALS USING SINGLE ELECTRONICS

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A single flux quantum (SFQ) pulse coincidence detector based on resistively shunted nonhysteretic Josephson junctions was designed and simulated. The coincidence detector generates an SFQ pulse when the delay between the arrival of SFQ pulses at its two inputs is less than the coincidence threshold. Simulations indicate that the minimum coincidence threshold time can be as short as 400 f 200 fs assuming Josephson junction characteristic voltages of 1 mV, overdamped dynamics and 4.2 K operating temperatures. Circuit architectures exploiting this gate are suggested. Estimates of the effects of thermal noise on resolution are presented indicating the potential for various time domain measurements with sub-picosecond resolution. I. INTRODUCTION The high speed properties of Josephson electronics offer unique possibilities for high time resolution metrology1 such as fast sampling, A-to-D conversion?^^ race arbiting? and time domain reflectometry5 In this paper I propose an ap- proach to time interval measurement that is based on a simple circuit consisting of several overdamped Josephson junctions. This circuit uses the picosecond pulses of Josephson junctions in a simple way that can be integrated naturally into a fre- quency vernier measurement apparatus? A junction with a nonhysteretic resistively shunted current-voltage characteristic can be induced to generate voltage pulses whose time integral is equal to the elementary flux quantum @pg = 2.07 mV-p~.~ In particular, the pulse width from an overdamped Josephson junction with a characteristic voltage VC = IcR~ is given by At = Q)/ VC and can be as short as 2 ps for a junction with a typical VC = 1 mV. The short widths of SFQ pulses combined with the high plasma frequencies possible with overdamped junctions can be exploited in a simple circuit that detects pulse coincidence from two inputs and has a coincidence threshold that can be as short as several hundred femtoseconds for junction IcR~ products around 1 mV. In the next section of this paper I describe the coincidence detection circuit operation, including the results of simulations estimating the potential- performance characteristics. The ef- fects of thermal fluctuations on resolution will be discussed. In Section I11 a time interval measurement system is de- scribed, based on the frequency vernier interpolation method. Using conventional electronics, the vernier method has at- tained time interval resolution limits of about 20 ps.* Our simulations show in principle that a carefully designed fre-

•Jan 1, 1993•0 citations
A Josephson sampler with direct resistive coupling between sampling gate and sampling pulse generator has been designed and simulated. The sampling gate and the sampling pulse generator comprise two Josephson junction interferometers. A short sampling pulse of 3ps width is generated at a suitable vortex to vortex transition. Delays up to 200ps between the sampling pulse and the main trigger input could be generated with an electronically adjustable circuit on the same chip. A layout of the complete sampling circuit, i.e. the sampling gate, the sampling pulse generator and the electronic delay circuit on a single 36mm2chip has been achieved for the Nb-NbxOy-PbInAu technology. The minimum line width is 8μm. Forj_{\max} = 3kA/cm2a time resolution of 3.5ps is predicted.
A high-resolution Josephson sampler using a single fluxoid is fabricated. The sampling pulse generator comprised a two-junction interferometer (DC–SQUID) with a damping resistance resistively coupled to a single junction as the sampling gate to reduce a turn-on delay. An ultra-fast sampling pulse was generated at a vortex-to-vortex transition in this sampler. The fabricated sampler had less than a 5ps time resolution and about a 5 µA current sensitivity. The dynamic waveform associated with two kinds of transitions was observed by the use of this sampler: a vortex-to-vortex transition and a vortex-to-voltage transition. The results show that the pulse corresponding to a single fluxoid has a nearly constant pulse height that is independent of the bias current and that setting the bias current near the critical point results in the long rise time of a DC–SQUID.
Measurement of signals generated by superconducting Josephson junction (JJ) circuits require ultra-fast components located in close proximity to the generating circuitry. We report a detailed study of optimal design criteria for a JJ-based sampler that balances the highest sampler bandwidth (shortest 10%-90% rise time) with minimal sampled waveform distortion. We explore the impacts on the performance of a sampler, realized using a single underdamped JJ as the logical sampling element (the comparator), due to the type of signal-comparator coupling scheme that is utilized (galvanic, inductive, or capacitive). In these simulations, we emulate the entire waveform reconstruction sampling process, via comparator threshold detection, while sweeping the time location at which the waveform is being sampled. We extract the sampled waveform rise time [or full width at half maximum (FWHM)] as a function of the comparator's Stewart-McCumber parameter and as a function of the coupling strength between the device under test and comparator. Based on our simulation results, we design, fabricate, and characterize a cryocooled (3.6 K operating temperature) JJ sampler utilizing the NIST state-of-the-art Nb/amorphous-Si/Nb junctions. We separately sample a step signal and an impulse generator co-located on-chip with the comparator and sampling strobe generator by implementing the same binary search comparator threshold detection technique during sampler operation as is used in simulation. With this technique, the system is fully digital and automated, and the operation of the fabricated device directly mirrors simulation. Our sampler technology shows a 10%-90% rise time of 3.3 ps and the capability to measure transient pulse widths of 2.5 ps FWHM. A linear system analysis of sampled waveforms indicates a 3 dB bandwidth of 225 GHz, but we demonstrate effective measurement of signals well above this-as high as 600 GHz.
Measurement of signals generated by superconducting Josephson junction (JJ) circuits require ultra-fast components located in close proximity to the generating circuitry. We report a detailed study of optimal design criteria for a JJ-based sampler which balances the highest sampler bandwidth (shortest 10\%--90\% rise time) with minimal sampled waveform distortion. We explore the impacts on performance of a sampler, realized using a single underdamped JJ as the logical sampling element (the comparator), due to the type of signal-comparator coupling scheme that is utilized (galvanic, inductive, or capacitive). In these simulations we emulate the entire waveform reconstruction sampling process, via comparator threshold detection, while sweeping the time location at which the waveform is being sampled. We extract the sampled waveform rise time (or FWHM) as a function of the comparator's Stewart-McCumber parameter and as a function of the coupling strength between the device under test and comparator. Based on our simulation results we design, fabricate, and characterize a cryocooled (3.6 K operating temperature) JJ sampler utilizing the NIST state-of-the-art Nb/amorphous-Si/Nb junctions. We separately sample a step signal and impulse generator co-located on-chip with the comparator and sampling strobe generator by implementing the same binary search comparator threshold detection technique during sampler operation as is used in simulation. With this technique the system is fully-digital and automated and operation of the fabricated device directly mirrors simulation. Our sampler technology shows a 10\%--90\% rise time of 3.3 ps and the capability to measure transient pulse widths of 2.5 ps FWHM. A linear systems analysis of sampled waveforms indicate a 3 dB bandwidth of 225 GHz, but we demonstrate effective measurement of signals well above this -- as high as 600 GHz.
The authors propose a new type of sampler design based on shunted junctions ( beta c =1). The sampler is to be used for the investigation of single flux quantum devices (RSFQ) employing similar junctions (Kaplunenko et al. 1989, Filippenko et al. 1991). They measure the time resolution of the sampler and delay time of the shunted Josephson junction array. The circuit was manufactured on a single chip and was DC powered. They employed Nb-AlO x -Nb tunnel junctions of 300 A m -2 critical current density and observed Josephson oscillations of the output junction at frequencies from 6 to 50 GHz. Despite a long plasma period of 20 ps the time resolution was 5 ps. The transmission line of 27 Josephson junctions (critical current 165 mu A each) demonstrated time delay of 0.5 ps mu A -1 .
A single flux quantum (SFQ) pulse coincidence detector based on resistively shunted nonhysteretic Josephson junctions was designed and simulated. The coincidence detector generates an SFQ pulse when the delay between the arrival of SFQ pulses at its two inputs is less than the coincidence threshold. Simulations indicate that the minimum coincidence threshold time can be as short as 400 f 200 fs assuming Josephson junction characteristic voltages of 1 mV, overdamped dynamics and 4.2 K operating temperatures. Circuit architectures exploiting this gate are suggested. Estimates of the effects of thermal noise on resolution are presented indicating the potential for various time domain measurements with sub-picosecond resolution. I. INTRODUCTION The high speed properties of Josephson electronics offer unique possibilities for high time resolution metrology1 such as fast sampling, A-to-D conversion?^^ race arbiting? and time domain reflectometry5 In this paper I propose an ap- proach to time interval measurement that is based on a simple circuit consisting of several overdamped Josephson junctions. This circuit uses the picosecond pulses of Josephson junctions in a simple way that can be integrated naturally into a fre- quency vernier measurement apparatus? A junction with a nonhysteretic resistively shunted current-voltage characteristic can be induced to generate voltage pulses whose time integral is equal to the elementary flux quantum @pg = 2.07 mV-p~.~ In particular, the pulse width from an overdamped Josephson junction with a characteristic voltage VC = IcR~ is given by At = Q)/ VC and can be as short as 2 ps for a junction with a typical VC = 1 mV. The short widths of SFQ pulses combined with the high plasma frequencies possible with overdamped junctions can be exploited in a simple circuit that detects pulse coincidence from two inputs and has a coincidence threshold that can be as short as several hundred femtoseconds for junction IcR~ products around 1 mV. In the next section of this paper I describe the coincidence detection circuit operation, including the results of simulations estimating the potential- performance characteristics. The ef- fects of thermal fluctuations on resolution will be discussed. In Section I11 a time interval measurement system is de- scribed, based on the frequency vernier interpolation method. Using conventional electronics, the vernier method has at- tained time interval resolution limits of about 20 ps.* Our simulations show in principle that a carefully designed fre-