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IEEE Transactions on Magnetics

Regulated AC power for Josephson interferometer latching logic circuits

P. Arnett, Dennis Herrell

Published Jan 1, 1979• 54 citations

Abstract

We have developed an ac power distribution scheme which provides switched regulated power of alternating polarity (no rectification necessary) for Josephson interferometer latching logic circuits. Distribution from the power source relies on a tree system of thin film transformers having single primaries and multiple secondaries to maintain low current levels and small phase skews throughout the system. Power signals are clipped on chip to the desired voltage supply level by series connected large area Josephson junctions ("regulator" junctions) and distributed across the chip by voltage busses. Supply resistors between the regulated voltage bus and the logic circuits define the operating current level. A detailed design is presented for a specific interferometer latching circuit family. We report experimental data on the two major components of the power system design - the regulators and the transformers. A series string of four regulator junctions provides a trapezoidal waveform of 11 mV amplitude at > 66% logic duty cycle (that portion of the machine cycle in which logic operations can be performed). Thin film transformers have their designed inductance (350 pH) and coupling coefficient ( > .90).

DOI: 10.1109/tmag.1979.1060124

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We have developed an ac power distribution scheme which provides switched regulated power of alternating polarity (no rectification necessary) for Josephson interferometer latching logic circuits. Distribution from the power source relies on a tree system of thin film transformers having single primaries and multiple secondaries to maintain low current levels and small phase skews throughout the system. Power signals are clipped on chip to the desired voltage supply level by series connected large area Josephson junctions ("regulator" junctions) and distributed across the chip by voltage busses. Supply resistors between the regulated voltage bus and the logic circuits define the operating current level. A detailed design is presented for a specific interferometer latching circuit family. We report experimental data on the two major components of the power system design - the regulators and the transformers. A series string of four regulator junctions provides a trapezoidal waveform of 11 mV amplitude at > 66% logic duty cycle (that portion of the machine cycle in which logic operations can be performed). Thin film transformers have their designed inductance (350 pH) and coupling coefficient ( > .90).

Josephson latching logic gates require an ac power supply for correct operation. Owing to the difficulty in fabricating Josephson regulators for large power currents, multi-phase sinusoidal power supply is the preferred method for multi-gigahertz operation. However, the inherently variable ac power reduces device margin for covering process variations. As a result, there exists a strong relationship between circuit size, maximum operating frequency and circuit throughput for a given available margin. The trade-offs between these performance criteria are analyzed for 3-junction-interferometer-based logic gates. Experimental evaluation of the multi-gigahertz operation of small circuits showed that careful design of power supply networks that reduce power supply fluctuations will be needed to maximize performance. Simulation and experimental results are discussed.

Josephson latching logic gates require an ac power supply for correct operation. Owing to difficulty in fabricating Josephson regulators for large power currents, multi-phase sinusoidal power supply is the preferred method for multi-gigahertz operation. However, the inherently variable ac power reduces device margin for covering process variations. As a result, there exists a strong relationship between circuit size, maximum operating frequency and circuit throughput for a given available margin. The trade-offs between these performance criteria are analyzed for 3-junction-interferometer- based logic gates. Experimental evaluation of the multi- gigahertz operation of small circuits showed that careful design of power supply networks that reduce power supply fluctuations will be needed to maximize performance. Simulation and experimental results will be discussed.

A Josephson superconducting quantum interference device (SQUID) digital logic family was developed that uses the R/sub nn/ region of a Josephson junction (JJ) to compensate for variations in where R/sub nn/ is the effective resistance of a JJ in the linear I-V region beyond the gap. The basic compensating junction logic (CJL) circuit is two 2-input-OR 1-2-1 interferometer isolators that, when switched, inject current into a 2-input-AND 1-2-1 interferometer. The R/sub nn/ region of several JJs is used in series with a resistor to set the current from the power supply to the 2-input-OR interferometers. The 2-input-AND interferometer is implemented with both current injection and magnetic coupling. The latch circuit uses both current injection and magnetic coupling design techniques to increase the range of I/sub O/, inductance, and resistance variation over which the latch will function correctly. Experimental measurements of CJL circuits are described.>

A new current-injection Josephson latch employing a single-flux quantum is proposed. It has a master-slave circuit configuration and operates under ac power supply. In the circuit, data are stored as a circulating current in a superconducting loop consisting of a single junction and inductances. A two-junction interferometer gate directly coupled to the loop reads out the stored data. Dual-rail signals are generated from the read-out data by Josephson junctions and resister-coupled Josephson logic gates. The isolation between a master circuit and a slave circuit is realized using high-impedance states in the Josephson junctions. The circuit design and computer-simulation results on the circuit operation are described in this paper.

This paper describes the design, fabrication and characterization of damped three-junction interferometers suitable for LSI latching logic. The high speed and low power dissipation of Josephson interferometers make them ideal devices for logic applications. However, their inherent high Q gives rise to resonances which appear as current steps in the quasiparticle curve. If not controlled, these current steps can interfere with the proper operation of logic circuits. Studies have shown that these resonances can be effectively damped by shunting the interferometer inductance with a small resistance. In this work the interferometers were made by placing the interferometer loops parallel to the groundplane and clustering the Josephson junctions together. This minimized the loop inductance associated with the counterelectrode which in turn meant that adequate damping could be achieved with metallurgically compatible short resistors connected only to the base electrode. The resultant structure with two overlying control lines each 2.5μm wide had an area of 0.008mm2. The Josephson junctions were 5μm in diameter. The measured damped resonance characteristics and threshold characteristics (Ig(Vg) and Im(Ic) respectively) of these structures agreed very well with theory.