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IEEE Transactions on Magnetics

Damped three-junction interferometers for latching logic

Linda Geppert, J. H. Greiner, Dennis Herrell, S. P. Klepner

Published Jan 1, 1979• 24 citations
Publisher

Abstract

This paper describes the design, fabrication and characterization of damped three-junction interferometers suitable for LSI latching logic. The high speed and low power dissipation of Josephson interferometers make them ideal devices for logic applications. However, their inherent high Q gives rise to resonances which appear as current steps in the quasiparticle curve. If not controlled, these current steps can interfere with the proper operation of logic circuits. Studies have shown that these resonances can be effectively damped by shunting the interferometer inductance with a small resistance. In this work the interferometers were made by placing the interferometer loops parallel to the groundplane and clustering the Josephson junctions together. This minimized the loop inductance associated with the counterelectrode which in turn meant that adequate damping could be achieved with metallurgically compatible short resistors connected only to the base electrode. The resultant structure with two overlying control lines each 2.5μm wide had an area of 0.008mm2. The Josephson junctions were 5μm in diameter. The measured damped resonance characteristics and threshold characteristics (Ig(Vg) and Im(Ic) respectively) of these structures agreed very well with theory.

DOI
10.1109/tmag.1979.1060085

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IEEE Transactions on Applied Superconductivity•Mar 1, 1993•0 citations
This paper describes the design, fabrication and characterization of damped three-junction interferometers suitable for LSI latching logic. The high speed and low power dissipation of Josephson interferometers make them ideal devices for logic applications. However, their inherent high Q gives rise to resonances which appear as current steps in the quasiparticle curve. If not controlled, these current steps can interfere with the proper operation of logic circuits. Studies have shown that these resonances can be effectively damped by shunting the interferometer inductance with a small resistance. In this work the interferometers were made by placing the interferometer loops parallel to the groundplane and clustering the Josephson junctions together. This minimized the loop inductance associated with the counterelectrode which in turn meant that adequate damping could be achieved with metallurgically compatible short resistors connected only to the base electrode. The resultant structure with two overlying control lines each 2.5μm wide had an area of 0.008mm2. The Josephson junctions were 5μm in diameter. The measured damped resonance characteristics and threshold characteristics (Ig(Vg) and Im(Ic) respectively) of these structures agreed very well with theory.
A 1:2:1 Josephson interferometer has been fabricated with small-area, high–current-density tunnel junctions. The short intrinsic RC times of these junctions result in device I-V characteristics with reduced hysteresis suitable for use in nonlatching logic circuits. The control current for this interferometer was fed directly, and asymmetrically, into the base electrode. Critical current versus control current measurements indicate that this device has a current gain greater than unity. The interferometer described represents an exploratory study of circuit design incorporating low-hysteresis junctions.
Abstract⎯We have fabricated the Bloch transistor shunted on-chip by a small-sized Cr resistor with Rs ≈ 1 kΩ. The Bloch transistor normally consists of two small Josephson junctions connected in series, which in our case have been replaced by two superconducting interferometer loops, each with two junctions in parallel. A capacitively coupled gate is supplied to control the induced charge of the small intermediate electrode (island) of the transistor. The measured I-V curves show no hysteresis and correspond to the operation of a effective Josephson junction at the high-damping and strong-noise limits. The critical current of the system was found to be close to its nominal value, that is in accordance with the electromagnetic environment theory. The I-V curves were modulated by the gate with a period of e and a maximum swing of about 2 µV. Such rather moderate modulation results from the Josephson-tocharging energies ratio, EJ/EC ≈ 9, in our sample being far from its optimum value ( ≈ 0.3÷1). I.
It has generally been assumed that the switching dynamics of Josephson logic devices can be well approximated by treating the Josephson device as a capacitatively-shunted switch which opens instantaneously when a control current crosses threshold. In this approximation, the switching delay is proportional to RC, where R = load resistance and C = device capacitance. However, we show here that the above approximation is quite incorrect in the technologically important case of logic interferometers in which resonances are suppressed by internal damping. We treat in detail the case of damped two-junction interferometers with step-function control current. Analysis of the equations of motion shows that in addition to the RC delay there is an initial turn-on delay during which the output voltage is very small, and which is most pronounced for heavy internal damping. It consists of the time required for the difference in phase between the two junctions to increase to a critical value, followed by approximately the first half-cycle of growth of the average of the junction phases. The turn-on delay is a strong function of overdrive, (i.e., the factor by which the control current amplitude exceeds threshold), being smallest at large overdrives, and scales as (C/i0)1/2, where i0= junction critical current. Hence it can be reduced by miniaturization and/or increased junction current density. For parameter values typical of 5μm Josephson circuit technology, the turn-on delay is on the order of 10pS at large overdrives (≃2).
We have fabricated the Bloch transistor shunted on-chip by a small-sized Cr resistor with R/sub s/=1 k/spl Omega/. The Bloch transistor normally consists of two small Josephson junctions connected in series, which in our case have been replaced by two superconducting interferometer loops, each with two junctions in parallel. A capacitively coupled gate is supplied to control the induced charge of the small intermediate electrode (island) of the transistor. The measured I-V curves show no hysteresis and correspond to the operation of a effective Josephson junction at the high-damping and strong-noise limits. The critical current of the system was found to be close to its nominal value, that is in accordance with the electromagnetic environment theory. The I-V curves were modulated by the gate with a period of e and a maximum swing of about 2 /spl mu/V. Such rather moderate modulation results from the Josephson-to-charging energies ratio, E/sub J//E/sub C//spl ap/9, in our sample being far from its optimum value (/spl ap/0.3+1).
The dynamic behavior of Josephson devices, in particular interferometers, is investigated with simple approximations and computer simulations. It is shown that in the latching and in the nonlatching operation modes, the control-inductance plays an important role in the logic delay in circuits with a fan-out of /spl ges/3. The mutual coupling between device and control line results in a crosstalk, which has to be considered in the design by a certain noise margin. For high-performance circuits, Josephson devices with a low ratio of control-line inductance to device inductance are required; besides other advantages, the interferometer meets this requirement better than the in-line Josephson junction.
A Josephson superconducting quantum interference device (SQUID) digital logic family was developed that uses the R/sub nn/ region of a Josephson junction (JJ) to compensate for variations in where R/sub nn/ is the effective resistance of a JJ in the linear I-V region beyond the gap. The basic compensating junction logic (CJL) circuit is two 2-input-OR 1-2-1 interferometer isolators that, when switched, inject current into a 2-input-AND 1-2-1 interferometer. The R/sub nn/ region of several JJs is used in series with a resistor to set the current from the power supply to the 2-input-OR interferometers. The 2-input-AND interferometer is implemented with both current injection and magnetic coupling. The latch circuit uses both current injection and magnetic coupling design techniques to increase the range of I/sub O/, inductance, and resistance variation over which the latch will function correctly. Experimental measurements of CJL circuits are described.>