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Joint Conference of the European Frequency and Time Forum and IEEE International Frequency Control Symposium (EFTF/IFCS)

A compact and low-power cold atom clock

Vishal Shah, Robert Lutwak, Richard E. Stoner, Mark J. Mescher

Published May 1, 2012• 3 citations
Publisher

Abstract

We report on our progress towards the development of a miniature cold atom frequency standard (MCAFS). The ultimate program objective is a chip-scale atomic clock (CSAC) with performance comparable to a bench top Cesium beam primary standard. We have addressed many of the critical hurdles of this project and demonstrated its feasibility with a compact and fully integrated prototype.

DOI
10.1109/fcs.2012.6243691

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Atomic clocks play a crucial role in timekeeping, communications, and navigation systems. Recent efforts enabled by heterogeneous MEMS integration have led to the commercial introduction of Chip-Scale Atomic Clocks (CSAC) with a volume of 16 cm3, power consumption of 120 mW, and instability (Allan Deviation) of σ(τ = 1 sec) < 2e-10. In order to reduce the temperature sensitivity of next-generation CSACs for timing applications, the interaction of atoms with the environment must be minimized, which can be accomplished in an architecture based on trapped, laser-cooled atoms. In this paper, we present results describing the development of a miniature cold-atom apparatus for operation as a frequency standard. Our architecture is based on laser-cooling a sample of neutral atoms in a Magneto-Optical Trap (MOT) using a conical retro-reflector in a miniature vacuum chamber. Trapping the atoms in vacuum and performing microwave interrogation in the dark reduces the temperature sensitivity compared to vapor-cell CSACs. We present details of the component development associated with the laser systems, opto-electronics, and vacuum package for miniature cold-atom technology. Finally, we conclude by characterizing the optimum alkali background pressure for such a cold-atom frequency standard.
We have undertaken a development effort to produce a prototype chip-scale atomic clock (CSAC). The design goals include short-term stability, with a total power consumption of less than 30 mW and overall device volume <1 cubic cm. The stringent power requirement dominates the physics package architecture, necessarily dictating a small volume gaseous atomic ensemble interrogated by a low-power semiconductor laser. At PTTI 2002 and PTTI 2003, we reported on laboratory experiments that underlie the fundamental architecture of our CSAC, based on interrogation of the cesium D1 transition by the technique of coherent population trapping (CPT). In the past year, the development effort has shifted from fundamental research and feasibility investigation to engineering and prototype development. In this paper, we report on the design of a rugged and compact physics package that is expected to exceed the ultimate performance and power requirements of the CSAC.
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We have undertaken the development of a chip-scale atomic clock (CSAC) whose design goals include short-term stability, sigma(sub y)(tau=1 hour), of 1x10(exp 11) with a total power consumption of 30 mW and an overall device volume of 1 cu cm. The stringent power requirement dominates the physics package architecture, dictating a small (<5 mm(exp 3) gaseous atomic ensemble interrogated by a low-power semiconductor laser. At PTTI 2002, we reported on initial experimental investigations leading to the decision to employ the coherent population trapping (CPT) interrogation technique. This paper describes our further progress on the CSAC effort, including the development of custom vertical cavity surface emitting laser (VCSEL) sources and techniques for microfabricating miniature cesium vapor cells comprised of anodically bonded silicon and glass. Measurements of the signal contrast and linewidth of both the cesium D1 and D2 resonance transitions are compared, and frequency stability measurements of the CSAC testbed are presented.
We report on progress in the characterization of systematic shifts in chip-scale atomic beam clocks, which offer the potential for improved long-term stability relative to existing chip-scale atomic clocks. Previous work has demonstrated the key features of chip-scale atomic beam devices including the use of a microfabricated Si/glass atomic beam cell, passively maintained vacuum environment, and an integrated Rb atomic beam source. A beam clock has been realized using Ramsey coherent population trapping interrogation with a demonstrated short-term fractional frequency stability of ≈ 1.2 × 10^(-9)at 1 s of integration. In this talk, we discuss the path toward long-term stabilty in chip-scale atomic beam clocks and leading clock systematics. Chip-scale atomic beams are a new platform for quantum sensing which offer the potential for long-term stability in compact, low-power applications.