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arXiv:2606.12262 · Applied Physics Letters

Substrate insulated Josephson junctions for superconducting quantum circuits

Urs Strobel, L. Radtke, Larissa Kamps, J. N. Voss, Jürgen Lisenfeld, Jakob Lenschen, J. N. Kämmerer, Jinji Luo-Hofmann, Danny Reuter, Sergei Masis, Alexey Vladimirovich Ustinov, Hannes Rotzinger

Published Sep 28, 2026• 0 citations
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Abstract

We have developed a fabrication technique for Josephson junctions that employs a three-dimensional patterned, low-loss substrate instead of commonly used organic resists. The technique enables the fabrication of high-quality trilayer junctions from a wide range of geometries and materials, including high-melting-point superconductors such as tantalum or niobium. The junction electrodes are free from intentionally introduced oxides and organic materials, which are known sources of decoherence. We fabricate and characterize underdamped Nb/AlOx/Nb junctions of different sizes in several geometries.

DOI
10.1063/5.0349777

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We have developed a fabrication technique for Josephson junctions that employs a three-dimensional patterned, low-loss substrate instead of commonly used organic resists. The technique enables the fabrication of high-quality trilayer junctions from a wide range of geometries and materials, including high-melting-point superconductors such as tantalum or niobium. The junction electrodes are free from intentionally introduced oxides and organic materials, which are known sources of decoherence. We fabricate and characterize underdamped Nb/AlOx/Nb junctions of different sizes in several geometries.
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A simple and robust process for fabricating low-Tc Josephson junction integrated circuits has been developed. The process is designed around the Nb/A1203-Al/Nb trilayer, and utilizes nine masking steps to form two separate levels of trilayer Josephson junctions, as well as resistors, capacitors, and transmission lines. Materials used for interlayer dielectrics and passivation layers are silicon dioxide and silicon nitride formed by Plasma Enhanced Chemical Vapor Deposition (PECVD). The PECVD equipment that we use yields a high deposition rate at moderate substrate temperatures. We see no degradation of the junction characteristics due to these depositions. The measured loss tangent of this dielectric at 10 GHz using a parallel plate technique is 4.44 x 10-4. The dielectric constant of this material is 5.1 in the range of 50 to 400 GHz, measured using an on-chip resonator capacitively coupled to a single shunted Josephson junction. The physical quality of the oxide has been investigated using a variety of tests and has proven to be excellent. We have successfully fabricated and tested a variety of simple circuits using this process technology. Much more complex circuits are currently under development (Fig. 1).
We have developed a new integration method for Josephson tunnel junctions based on high Tc superconducting compound materials such as NbN. In this method, a sputtered ZnO film has been employed as a resist mask which can be used in high substrate temperatures during the film deposition. It has been found that fine patterns of the refractory superconducting film can be obtained by this method and the patterning processes have no interference with other integration processes. We have applied this method to patterning base electrode of NbN and formed high quality NbN-oxide-Pb Josephson tunnel junctions by using an rf plasma oxidation. The fabricated junctions have been found to have a relatively large gap ( ∼ 4.0 mV ) and low current leak in the subgap region, and to be quite stable for thermal cyclings and storage. We have also fabricated quantum interference memory devices by integrating these junctions and the operation has been successfully demonstrated.
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A trilayer deposition process for making high quality all-refractory Nb/AlOx/Nb Josephson junctions is described. The sputtering parameters were optimized to deposit very uniform Al films, less than 5 nm in thickness. We found that it was essential to keep the substrate temperature below 40 °C during Al deposition but not during Nb depositions. Rapid anodization of the Nb counterelectrode allowed us to use positive photoresist as an anodization mask even for submicron geometries. The dc superconducting quantum interference devices made with this process have the lowest intrinsic energy sensitivity reported to date for an all-refractory technology.
We have developed a fabrication technology for superconducting integrated circuits with Nb-based Josephson junctions. The standard fabrication process with 10 mask levels includes 3 Nb superconducting layers and a Mo resistor layer. The influence of deposition parameters on film stress, electrical properties, and surface roughness were studied systematically. High quality Nb, Al, Mo, and SiO2films were successfully deposited for the subsequent fabrication of circuits. The circuit fabrication started with the fabrication of Mo resistors with a target sheet resistanceRshof 2 Ω, followed by the deposition of Nb/Al-AlOx/Nb trilayer Josephson-junction. The target critical current densityJcwas set at 6 kA/cm2. Small-scale circuits such as our standard library cells have been successfully fabricated and tested, confirming the capability of our fabrication technology for superconducting integrated circuits.