Noisy and Intermediate-Scale Quantum, or NISQ, processors are sensitive to noise, prone to quantum decoherence, and are not yet capable of continuous quantum error correction for fault-tolerant quantum computation. Hence, quantum algorithms designed in the pre-faulttolerant era cannot neglect the noisy nature of the hardware, and investigating the relationship between quantum hardware performance and the output of quantum algorithms is essential. In this work, we experimentally study how hardware-aware variational quantum circuits on a superconducting quantum processing unit can model distributions relevant to specific use-case applications for Credit Risk Analysis, e.g., standard Gaussian distributions for latent factor loading in the Gaussian Conditional- Independence model. We use a transpilation technique tailored to the specific quantum hardware topology, which minimizes gate depth and connectivity violations, and we calibrate the gate rotations of the circuit to achieve an optimized output from quantum algorithms. Our results demonstrate the viability of quantum adaptation on a small scale, proof-of-concept model inspired by financial applications and offer a good starting point for understanding the practical use of NISQ devices.
Noisy and Intermediate-Scale Quantum, or NISQ, processors are sensitive to noise, prone to quantum decoherence, and are not yet capable of continuous quantum error correction for fault-tolerant quantum computation. Hence, quantum algorithms designed in the pre-faulttolerant era cannot neglect the noisy nature of the hardware, and investigating the relationship between quantum hardware performance and the output of quantum algorithms is essential. In this work, we experimentally study how hardware-aware variational quantum circuits on a superconducting quantum processing unit can model distributions relevant to specific use-case applications for Credit Risk Analysis, e.g., standard Gaussian distributions for latent factor loading in the Gaussian Conditional- Independence model. We use a transpilation technique tailored to the specific quantum hardware topology, which minimizes gate depth and connectivity violations, and we calibrate the gate rotations of the circuit to achieve an optimized output from quantum algorithms. Our results demonstrate the viability of quantum adaptation on a small scale, proof-of-concept model inspired by financial applications and offer a good starting point for understanding the practical use of NISQ devices.
The rapid advancement of Noisy Intermediate-Scale Quantum (NISQ) devices has driven the need for efficient design automation tools that can translate complex engineering models into executable quantum circuits. This study explores the development of automated quantum circuit design frameworks focused on gate optimization and noise-aware compilation, enabling practical quantum computation for engineering applications such as optimization, simulation, and control systems. Traditional circuit design methods often fail to account for hardware constraints, decoherence, and gate infidelity, which significantly affect computational accuracy on NISQ devices. To address these challenges, this research introduces a hybrid automation approach combining quantum transpilation, variational circuit pruning, and error-aware synthesis algorithms to enhance circuit reliability and scalability. The framework integrates quantum-classical co-design principles to optimize both logical and physical circuit layers, leveraging hardware-specific calibration data to adapt compilation strategies dynamically. Through simulations and benchmark analysis, the proposed system demonstrates significant improvements in quantum resource utilization, error mitigation, and gate depth reduction compared to conventional compilation methods. This work underscores the growing importance of design automation in quantum engineering, where algorithmic efficiency must be harmonized with physical constraints to realize functional and scalable quantum workflows. By establishing a methodology for gate-level optimization and noise-adaptive design, the study contributes to bridging the gap between theoretical quantum algorithms and real-world engineering implementations within the NISQ computing era.
Noisy Intermediate-Scale Quantum (NISQ) devices are promising platforms for practical quantum computing, but their performance is significantly affected by limited qubit availability, gate errors, decoherence, circuit depth, and hardware-dependent noise. Conventional quantum circuits are generally designed and optimized before execution and may not respond effectively to changing hardware conditions during computation. This research proposes a Self-Adaptive Quantum Circuit framework that dynamically modifies quantum circuits according to the current computational resources and noise characteristics of NISQ devices. The proposed framework monitors parameters such as qubit fidelity, gate error rates, circuit depth, execution time, and resource availability, and automatically selects suitable circuit configurations to improve computational performance. Adaptive mechanisms can be employed to reduce unnecessary gates, optimize qubit utilization, and mitigate the impact of hardware noise while maintaining the required computational accuracy. The framework will be evaluated using simulation platforms and available NISQ quantum hardware, comparing adaptive circuits with conventional static circuits using metrics such as accuracy, fidelity, circuit depth, gate count, execution time, and error rate. The expected outcome is a resource-efficient and noise-aware quantum circuit optimization approach capable of improving the reliability and performance of quantum applications on near-term quantum hardware. The proposed research aims to contribute toward more practical, flexible, and hardware-aware quantum computing systems for NISQ-era applications. Keywords: NISQ Computing, Self-Adaptive Quantum Circuits, Quantum Circuit Optimization, Quantum Error Mitigation, Quantum Noise, Quantum Computing.
Hybridizing machine learning (ML) with quantum computing has become an attractive strategy to increase computational power on Noisy Intermediate Scale Quantum (NISQ) devices. Although these can be potentially quantum advantage devices, their qubit numbers and noise are bounded and there are challenges when it comes to practical quantum circuit realization. This work concentrates on the creation of optimized quantum circuits via ML-based strategies, to enhance the performance of the circuits, to reduce the error rate and to accommodate the particular noise profile of the hardware of NISQ devices. The resulting suboptimal mappings with little or no consideration of noise and hardware topology in traditional quantum compilers can ruin the fidelity of quantum algorithm. Leveraging machine learning, and specifically reinforcement and supervised learning methods, our method learns to optimize compilation strategy for specific quantum hardware architecture. The paper proposes a framework that uses machine learning models to predict qubit mappings, gate decompositions, and transpilation paths that minimize gate depth and error accumulation. We also investigate transfer learning methods for propagating the learned compilation strategies to novel NISQ machines. Such methods are empirically validated on both simulated and real quantum hardware backends, providing evidence of circuit depth, execution time and error reductions. The results show that ML-assisted compilation can achieve better success probabilities for benchmark quantum algorithms like VQE and QAOA than conventional compilers. Furthermore, the work examines the interpretability of ML models providing hardware-aware optimization recommendations and understanding the noise patterns and methods of error correction. Our work highlights the key role of ML for transferring between theoretical quantum algorithms and their practical NISQ implementations. This integration boosts the immediate applicability of existing quantum devices and provides a basis for adaptive and scalable likelihood-based compilation for the era of fault-tolerant quantum computation. Our results motivate further investigation of hybrid classical-quantum workflows, in which ML iteratively improves compilation in accordance with changing hardware noise and capabilities. By improving quantum circuit compilation onNISQ computers, this work is taking steps toward the realization of quantum advantage in application scenarios such as optimization, cryptography, and quantum simulation without needing to wait for fully fault-tolerant large-scale quantum computers.
Today’s Noisy Intermediate-Scale Quantum (NISQ) computers support only limited sets of available quantum gates and restricted connectivity. Therefore, quantum algorithms must be transpiled in order to become executable on a given NISQ computer; transpilation is a complex and computationally heavy process. Moreover, NISQ computers are affected by noise that changes over time, and periodic calibration provides relevant error rates that should be considered during transpilation. Variational algorithms, which form one main class of computations on NISQ platforms, produce a number of similar yet not identical quantum "ansatz" circuits. In this work, we present a transpilation methodology optimized for variational algorithms under potentially changing error rates. We divide transpilation into three steps: (1) noise-unaware and computationally heavy pre-transpilation; (2) fast noise-aware matching; and (3) fast decomposition followed by heuristic optimization. For a complete run of a variational algorithm under constant error rates, only step (3) needs to be executed for each new ansatz circuit. Step (2) is required only if the error rates reported by calibration have changed significantly since the beginning of the computation. The most expensive Step (1) is executed only once for the whole run. This distribution is helpful for incremental, calibration-aware transpilation when the variational algorithm adapts its own execution to changing error rates. Experimental results on IBM’s quantum computer show the low latency and robust results obtained by calibration-aware transpilation.
Quantum computing promises to solve complex problems beyond the capabilities of classical computers. However, the practical implementation of quantum algorithms on Noisy Intermediate-Scale Quantum (NISQ) devices is significantly challenged by various noise sources that degrade computational fidelity. Transpilation—the process of converting high-level quantum circuits into optimized, hardware-specific instructions—plays a crucial role in mitigating these noise effects. In this paper, we present a comprehensive study on enhancing noise resilience in quantum algorithms through advanced transpilation techniques, evaluated using the SupermarQ benchmarking suite. By systematically analyzing the impact of different optimization levels in Qiskit’s transpiler on a diverse set of quantum algorithms, we demonstrate how specific transpilation strategies influence key performance metrics related to noise resilience. Our results show that higher optimization levels can improve metrics such as Liveness (LV) and Parallelism (PL), leading to more reliable quantum computations on NISQ hardware. This work contributes to the development of noise-adaptive transpilation methods that incorporate noise characteristics into the optimization process, ultimately enhancing the practical viability of quantum algorithms.
Credit Valuation Adjustment (CVA) requires repeated risk-neutral expectation estimation, making it a natural test bed for quantum amplitude estimation, whose coherent amplification can in principle reduce Monte Carlo sampling cost. Whether this advantage survives realistic financial encoding and noisy hardware remains open. We develop an end-to-end, noise-aware quantum workflow for CVA, covering market calibration, discretisation, oracle construction, hardware execution and error-budget analysis. The model combines a correlated two-asset exposure with discount and default factors, encoded through a QCBM-based joint time-market distribution and controlled payoff rotations. We introduce contrast-aware Bayesian iterative quantum amplitude estimation (CABIQAE), which incorporates experimentally calibrated Grover-contrast loss into Bayesian inference and circuit-depth selection. Hardware-calibrated experiments show that CABIQAE exploits the limited amplification available on current devices more effectively than noise-agnostic alternatives and achieves a much lower classical post-processing runtime than the noise-aware BAE baseline. The analysis further decomposes the total CVA error into statistical, encoding, discretisation and hardware contributions. The full CVA oracle remains limited by circuit depth and discretisation resolution.