Mid-circuit logic executed in the qubit layer of a quantum processor
Cameron Jones, Piper Wysocki, MengKe Feng, Gerardo A. Paz-Silva, Corey I. Ostrove, Tuomo Tanttu, Kenneth M. Rudinger, Samuel K. Bartee, Kevin Young, Fay E. Hudson, Wee Han Lim, Nikolay V. Abrosimov, Hans-Joachim Pohl, Michael L. W. Thewalt, Robin Blume-Kohout, Andrew S. Dzurak, Andre Saraiva, Arne Laucht, Chih Hwan Yang
quant-phcond-mat.mes-hallSubmitted Dec 14, 2025• Announced Dec 16, 2025• 1 citation• Revised Mar 4, 2026 (v2)
Practical quantum computers need to continuously exchange data between classical and quantum subsystems during a computation. Mid-circuit measurements of a qubits state are transferred to the classical electronics layer, and their outcome can inform feedforward operations that close the loop back to the quantum layer. These operations are crucial for fault-tolerant quantum computers, but the quantum-classical loop must be completed before the qubits decohere, presenting a substantial engineering challenge for full-scale systems comprising millions of qubits. Here we perform the first mid-circuit measurements in a system of silicon spin qubits, and show that feedforward operations can be performed without needing to route information to the classical layer. This in-layer approach leverages a backaction-driven control technique that has previously been considered a source of error. We benchmark our in-layer strategy, together with the standard FPGA-enabled approach, and analyse the performance of both methods using gate set tomography. Our results provide the first step towards moving resource-intensive classical processing into the quantum layer, an advance that could solve key engineering challenges, and drastically reduce the power budget of future quantum computers.
Practical quantum computers need to continuously exchange data between classical and quantum subsystems during a computation. Mid-circuit measurements of a qubits state are transferred to the classical electronics layer, and their outcome can inform feedforward operations that close the loop back to the quantum layer. These operations are crucial for fault-tolerant quantum computers, but the quantum-classical loop must be completed before the qubits decohere, presenting a substantial engineering challenge for full-scale systems comprising millions of qubits. Here we perform the first mid-circuit measurements in a system of silicon spin qubits, and show that feedforward operations can be performed without needing to route information to the classical layer. This in-layer approach leverages a backaction-driven control technique that has previously been considered a source of error. We benchmark our in-layer strategy, together with the standard FPGA-enabled approach, and analyse the performance of both methods using gate set tomography. Our results provide the first step towards moving resource-intensive classical processing into the quantum layer, an advance that could solve key engineering challenges, and drastically reduce the power budget of future quantum computers.
Silicon-based spin qubits have emerged as a promising platform for scalable quantum computation due to their compatibility with advanced semiconductor fabrication and integration with classical CMOS electronics. As fabrication capabilities advance toward larger, higher-yield devices, the field is transitioning from academic prototypes toward processors ultimately requiring millions of qubits. This shift places increasing emphasis on developing operating techniques that scale with qubit number. In this thesis, a four qubit SiMOS processor is used to investigate three key aspects of multi-qubit operation for spin-based quantum computing. First, tuning and operation techniques for parallel double-quantum-dot unit cells are developed. Electron loading strategies enable four-qubit operation in an isolated charge configuration, and universal single- and two-qubit control is demonstrated. The native gate set is characterised using gate set tomography. The processor is operated as two unit cells that can be initialised and read out in parallel, providing two independent parity measurements per shot, without increasing operation time or degrading state preparation and measurement fidelity. Second, control techniques for generating multi-qubit entangled states and executing general quantum circuits are established. Three-qubit maximally entangled states, including cluster and Greenberger–Horne–Zeilinger states, are generated and measured with a maximum fidelity of 82.5%. A Mermin value of 3.14 is achieved, certifying genuine tripartite entanglement. A fully symmetric dynamically decoupled gate sequence is developed, extending the entanglement lifetime beyond T2* to a limit set by T2-Hahn. A workflow for compiling, executing, and analysing arbitrary circuits from OpenQASM is also demonstrated. Finally, the first mid-circuit measurements in a silicon spin-qubit system are presented. This capability is extended to feedforward control, including a novel “in-layer” method that performs conditional phase operations without routing information to the classical control layer. This approach leverages measurement-induced backaction as a control mechanism. Both in-layer and FPGA-enabled feedforward strategies are benchmarked, and their dominant error channels are identified.
Reaching fault-tolerant quantum computation relies on the successful implementation of non-Clifford circuits with quantum error correction (QEC). In QEC, quantum gates and measurements encode quantum information into an error-protected Hilbert space, while classical processing decodes the measurements into logical errors. QEC non-Clifford gates pose the greatest computation challenge from the classical controller's perspective, as they require mid-circuit decoding-dependent feed-forward—modifying the physical gate sequence based on the decoding outcome of previous measurements within the same circuit. In this work, we introduce the first benchmarks to holistically evaluate the capability of a combined controller–decoder system to run non-Clifford QEC circuits. We show that executing an error-corrected non-Clifford circuit, comprised of numerous non-Clifford gates, strictly hinges upon the classical controller–decoder system. Particularly, its ability to perform decoding-based feed-forward with low latency, defined as the time between the last measurement required for decoding and the dependent mid-circuit quantum operation. We analyze how the system's latency dictates the circuit's operational regime: latency divergence, classical-controller-limited runtime, or quantum-operation-limited runtime. Based on this understanding, we introduce latency-based benchmarks to set a standard for developing QEC control systems as the essential components of fault-tolerant quantum computation.
Current quantum computing platforms suffer from readout errors, where faulty measurement outcomes are reported by the device. These errors are particularly harmful in quantum programs that rely on branch statements, where operations in later parts of the program are dynamically determined by mid-circuit measurements. We propose a general protocol for mitigating mid-circuit measurement errors. Our solution works for any number of mid-circuit measurement and feedforward layers without increasing circuit depth or two-qubit gate counts, is efficient under structural assumptions on error channels, and is suitable for immediate application on noisy intermediate-scale quantum devices. We experimentally demonstrate up to a ∼ 60 % reduction in error on superconducting quantum processors across several practically relevant feedforward circuits, including dynamic qubit resets, shallow-depth Greenberger–Horne–Zeilinger state preparation, and multistage quantum teleportation. This work paves the way for more error-resilient adaptive quantum circuits, crucial for current and future quantum computing applications.
Quantum computers promise to solve computational problems that are inaccessible to classical machines. The reliable execution of large-scale quantum algorithms requires robust operations in the presence of noise. Quantum error correction addresses this challenge by encoding quantum information redundantly across several physical qubits, such that errors can be detected and corrected during a computation. However, no single error-correcting code intrinsically supports an inherently robust, fault-tolerant implementation of all gates needed for universal quantum computing. Moreover, most modern approaches to both quantum error correction and the implementation of universal logical operations on encoded qubits rely on mid-circuit measurements and feed-forward control. These types of operations are technologically demanding, often slow, and prone to high error rates, and they limit the overall success probability of quantum algorithms. In this thesis, we develop fault-tolerant protocols and circuits for quantum error correction and universal logical computation, with an emphasis on implementations compatible with current hardware systems. We first focus on fault-tolerant quantum error correction on small codes. By comparing different protocols, we identify trade-offs between compact circuit constructions and their robustness to noise. We then assess their practical performance by comparing numerical simulations of noisy circuits with experimental data. Beyond the preservation of encoded information, we study how universal logic can be implemented in a fault-tolerant manner on encoded qubits. A central approach considered in this thesis is code switching, in which logical information is transferred between two distinct error-correcting codes that support complementary sets of inherently fault-tolerant logical gates. In combination, these codes give access to a complete universal fault-tolerant logical gate set. In this thesis, we determine conditions that allow us to construct fault-tolerant protocols for code switching. We adapt these protocols to the capabilities of current hardware, thereby enabling the first experimental realization of universal fault-tolerant logic by means of code switching. However, the overall performance of these schemes is limited by slow and noisy mid-circuit measurements. To address this bottleneck, we construct a suite of measurement-free fault-tolerant universal operations that do not require any measurements during the execution of an algorithm. In this framework, error correction and logical operations are implemented coherently as part of the quantum circuit, without mid-circuit measurements or in-sequence classical control. We introduce measurement-free code-switching schemes that can be scaled to arbitrary code distances through concatenation, and which thereby provide, in principle, arbitrarily strong error suppression. We further tailor our approach to the capabilities of current trapped-ion quantum processors. New circuit constructions support the first experimental implementation of a logical quantum algorithm without mid-circuit measurements, demonstrated through Grover's search on three encoded qubits. Together, the results of this thesis expand the toolbox for early fault-tolerant quantum computation. They show how protocols for quantum error correction and universal logical gates can be designed without mid-circuit measurements with realistic hardware constraints in mind, opening new pathways towards universal quantum logic.
The realization of fault-tolerant quantum computation hinges on the ability to execute deep quantum circuits while maintaining gate fidelities consistently above error-correction thresholds. Although neutral-atom arrays have recently demonstrated high-fidelity two-qubit gates and early-stage logical quantum processors, sustaining such high performance across deep, repetitive circuits remains a formidable challenge due to cumulative motional heating and atom loss. Here we demonstrate a sustainable neutral-atom framework that overcomes these limitations by integrating a suite of hardware-efficient mid-circuit operations. We report a two-qubit controlled logic gate with a raw fidelity of 99.60(1)%, which is further increased to a fidelity of 99.81(1)% via non-destructive erasure detection. Crucially, by implementing in-circuit Raman sideband cooling and qubit re-initialization, we demonstrate that gate fidelities can be maintained at the ~99.8% level across multiple operational rounds without observable degradation. By actively managing the internal and motional entropy of the system mid-stream, our in-situ refreshable architecture provides a critical pathway for executing the repeated syndrome-extraction cycles required for large-scale, continuous quantum error correction.
Recent advances in quantum error correction codes for fault-tolerant quantum computing and physical realizations of high-fidelity qubits in multiple platforms give promise for the construction of a quantum computer based on millions of interacting qubits. However, the classical-quantum interface remains a nascent field of exploration. Here, we propose an architecture for a silicon-based quantum computer processor based on complementary metal-oxide-semiconductor (CMOS) technology. We show how a transistor-based control circuit together with charge-storage electrodes can be used to operate a dense and scalable two-dimensional qubit system. The qubits are defined by the spin state of a single electron confined in quantum dots, coupled via exchange interactions, controlled using a microwave cavity, and measured via gate-based dispersive readout. We implement a spin qubit surface code, showing the prospects for universal quantum computation. We discuss the challenges and focus areas that need to be addressed, providing a path for large-scale quantum computing.