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arXiv:2410.11721 · Nature Communications

Supercurrent time division multiplexing with solid-state integrated hybrid superconducting electronics

Alessandro Paghi, Laura Borgongino, Simone Tortorella, Giorgio De Simoni, Elia Strambini, Lucia Sorba, Francesco Giazotto

Published Sep 26, 2025• 3 citations
arXivHTMLPDF

Abstract

Time-division multiplexing of cryogenic signals is a promising approach to reduce space requirements, shorten cooldown times, and increase the number of quantum devices measured per cooldown. We demonstrate time-division multiplexing of non-dissipative supercurrents using voltage-controlled hybrid superconducting demultiplexers. These chips integrate superconducting Josephson Field Effect Transistors including Al superconducting electrodes, proximitized semiconducting InAs channels, and hafnium oxide gate insulators. Each transistor fully suppresses the switching current and increases the resistance 20 times under a gate voltage of −4.5 V. A demultiplexer with one input and eight outputs showed a non-dissipative input range of ±2 μA, operating up to 100 MHz in signal frequency, and 100 kHz in switching frequency at 50 mK. It achieved near-zero insertion loss in the superconducting state and an $$\frac{{ON}}{{OFF}}$$ ratio of 17.5 dB. By optimizing the signal layout, the operation was extended up to 4 GHz using a demultiplexer with two outputs. The authors report a 1-input-8-ouput superconducting demultiplexer consisting of 14 Al-InAs-Al Josephson Field Effect Transistors, enabling time-division multiplexing of non-dissipative current up to several GHz. This strategy can reduce the number of I/O lines to drive cryogenic electrical devices in quantum applications.

DOI
10.1038/s41467-025-62931-3

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Abstract Superconducting circuits based on hybrid InAs Josephson Junctions (JJs) play a starring role in the design of fast and ultra‐low power consumption solid‐state quantum electronics and exploring novel physical phenomena. Conventionally, 3D substrates, 2D quantum wells (QWs), and 1D nanowires (NWs) made of InAs are employed to create superconducting circuits with hybrid JJs. Each platform has its advantages and disadvantages. Here, the InAs‐on‐insulator (InAsOI) is proposed as a groundbreaking platform for developing superconducting electronics. An epilayer of semiconducting InAs with different electron densities is grown onto an InAlAs metamorphic buffer, efficiently used as a cryogenic insulator to decouple adjacent devices electrically. JJs with various lengths and widths are fabricated employing Al as a superconductor and InAs with different electron densities. A switching current density of 7.3 µA µm−1, a critical voltage of 50‐to‐80 µV, and a critical temperature equal to that of the superconductor used are achieved. For all the JJs, the switching current follows a Fraunhofer‐like pattern with the out‐of‐plane magnetic field. These achievements enable the use of InAsOI to design and fabricate surface‐exposed Josephson Field Effect Transistors with high critical current densities and superior gating properties.
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Thousands to millions of sensitive signals will need to be conveyed through all the temperature stages of a dilution fridge to operate future large-scale quantum processors made of many quantum bits. The exploding number of heat-conductive coaxial cables will overwhelm the fridge cooling capabilities, detrimental to the quantum core. Moving the control electronics down to cryogenic temperatures allows the use of already-available superconducting cables, alleviating heat conduction between low-temperature stages, and appears as a clear path towards scalability in the number of operating qubits.This Ph.D. work aimed to explore the use of the industrial CMOS 28nm Fully-Depleted Silicon-On-Insulator (FD-SOI) technology at cryogenic temperatures for quantum computing applications. Our first objective is to extend the sparse existing knowledge about the FD-SOI 28nm transistors at cryogenic temperatures for practical aspects of circuit design and later for developments of compact models.To speed-up the characterization of single devices with the inherent hour-long cooling cycles, we designed an integrated circuit multiplexing a thousand of transistors for different geometries and gate-stack flavors for low-frequency measurement of the current-voltage characteristics and pair-matching analysis from 300 down to 0.1K. We discuss and analyze the evolution trends with varying geometry at different temperatures for important quantities in circuit design, such as the transconductance, the conductance, and the transconductance over drain current ratio of individual transistors.Secondly, we explore the low-temperature co-integration and the full on-chip integration of semiconductor quantum devices with classical electronics aimed at specific measurements down to the millikelvin range.We first focus on the sub-nanoampere current measurement of quantum dot devices by designing and characterizing a low-power transimpedance amplifier (TIA). The high-gain amplifier is successfully applied to measure the current across single- and double quantum-dot devices, respectively wire-bonded a few mm away or on-chip integrated a few micrometers-away. To further leverage the integration into the same substrate, we connected GHz-range voltage-controlled oscillators to one of the gates of the double dot in an attempt to observe discrete charge pumping in a fully-integrated device.Lastly, we tackled the measurement of the gate capacitance of single quantum devices by proposing a new measurement scheme making use of the cryogenic electronics capabilities as an alternative to the well-known reflectometry. By integrating a voltage-controlled current excitation and a voltage-sensing amplifier in the 200 MHz range, both in close proximity to the quantum device connected to an LC tank, the read-out circuitry of a variation in the device capacitance becomes a purely lumped-element system with impedance measurement of the resonant circuit without any wave propagation like in reflectometry. This approach increases simplicity and compactness of the measurement set-up. We even replace the bulky passive inductor used in reflectometry by an active inductor made of transistors and capacitors, offering improved scalability with a 3-orders of magnitude lower area for the same inductance. The resulting circuit successfully measured aF-capacitance variations of nanometric transistors at 4.2K revealing oscillatory quantum effects in the gate capacitance as a function of the gate and back-gate voltages.At the end of this dissertation, a picture is given with the challenges laying ahead related to circuit architecture and design for the ultimate goal of entering into the era of large-scale quantum processing.
Trapped-ion quantum computers based on the quantum charge-coupled device architecture require on the order of ten trap electrodes per qubit, making the number of vacuum feedthroughs a bottleneck at the system scale. Time-division multiplexed (TDM)-based voltage control for trap electrodes provides a natural route to alleviate this constraint. However, previous studies have been limited to architectural proposals for static trap-potential compensation and room-temperature demonstrations of dynamic-electrode control, leaving cryogenic operation of TDM-based voltage control for static and dynamic electrodes experimentally unexplored. In this study, we develop and cryogenically validate TDM-based voltage control schemes for two distinct electrode classes. For static electrodes used in trap-potential compensation, we implement a 32-channel demultiplexed system operating at approximately 27~K, achieving an effective voltage update rate of 37.5~kHz with an output range of ±10 V\pm10~\mathrm{V}±10 V per channel. For dynamic electrodes used in ion operations, such as shuttling, we implement a four-channel demultiplexed system operating at approximately 14~K, achieving an effective voltage update rate of 1~MHz with a comparable output range. These results establish TDM-based voltage control as a practical approach for both electrode classes, providing a path for mitigating the vacuum feedthrough bottleneck in scalable trapped-ion quantum processors.
Abstract Cryogenic qubit controllers (QCs) are the key to build large-scale superconducting quantum processors. However, developing scalable QCs is challenging because the cooling power of a dilution refrigerator is too small (~10 μW at ~10 mK) to operate conventional logic families, such as complementary metal-oxide-semiconductor logic and superconducting single-flux-quantum logic, near qubits. Here we report on a scalable QC using an ultra-low-power superconductor logic family, namely adiabatic quantum-flux-parametron (AQFP) logic. The AQFP-based QC, referred to as the AQFP-multiplexed QC (AQFP-mux QC), produces multi-tone microwave signals for qubit control with an extremely small power dissipation of 81.8 pW per qubit. Furthermore, the AQFP-mux QC adopts microwave multiplexing to reduce the number of coaxial cables for operating the entire system. As a proof of concept, we demonstrate an AQFP-mux QC chip that produces microwave signals at two output ports through microwave multiplexing and demultiplexing. Experimental results show an output power of approximately −80 dBm and on/off ratio of ~40 dB at each output port. Basic mixing operation is also demonstrated by observing sideband signals.
Multiplexed local charge storage, close to quantum processors at cryogenic temperatures could generate a multitude of control signals, for electronics or qubits, in an efficient manner. Such cryogenic electronics require generating quasi-static control signals with small area footprint, low noise, high stability, low power dissipation and, ideally, in a multiplexed fashion to reduce the number of input/outputs. In this work, we integrate capacitors with cryogenic high-electron mobility transistor (HEMT) arrays and demonstrate quasi-static bias generation using gate pulses controlled in time and frequency domains. Multi-channel bias generation is also demonstrated. Operation at 4 K exhibits improved bias signal variability and greatly reduced subthreshold swing, reaching values of ~6 mV/decade. Due to the very low threshold voltage of 80 mV at 4 K and the steep subthreshold swing, these circuits can provide an advantage over the silicon-based complementary metal-oxide-semiconductor equivalents by allowing operation at significantly reduced drive bias in the low output voltage regime <1 V. Together with their high-speed operation, this makes HEMTs an attractive platform for future cryogenic signal generation electronics in quantum computers.