Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

arXiv:2605.17824 · Applied Physics Letters

Cryogenic Time-Division-Multiplexed Voltage Control for Scalable Trapped-Ion Quantum Processors

Ryutaro Ohira, Shinichi Morisaka, Yoshinori Kurimoto, Toshiaki Inada, Ippei Nakamura, Takefumi Miyoshi, Atsushi Noguchi

quant-phSubmitted May 18, 2026• Announced May 19, 2026• 0 citations
arXivHTMLPDF

Abstract

Trapped-ion quantum computers based on the quantum charge-coupled device architecture require on the order of ten trap electrodes per qubit, making the number of vacuum feedthroughs a bottleneck at the system scale. Time-division multiplexed (TDM)-based voltage control for trap electrodes provides a natural route to alleviate this constraint. However, previous studies have been limited to architectural proposals for static trap-potential compensation and room-temperature demonstrations of dynamic-electrode control, leaving cryogenic operation of TDM-based voltage control for static and dynamic electrodes experimentally unexplored. In this study, we develop and cryogenically validate TDM-based voltage control schemes for two distinct electrode classes. For static electrodes used in trap-potential compensation, we implement a 32-channel demultiplexed system operating at approximately 27~K, achieving an effective voltage update rate of 37.5~kHz with an output range of $\pm10~\mathrm{V}$ per channel. For dynamic electrodes used in ion operations, such as shuttling, we implement a four-channel demultiplexed system operating at approximately 14~K, achieving an effective voltage update rate of 1~MHz with a comparable output range. These results establish TDM-based voltage control as a practical approach for both electrode classes, providing a path for mitigating the vacuum feedthrough bottleneck in scalable trapped-ion quantum processors.

Comments
7 pages, 4 figures

Related papers

Trapping an atomic ion using time-division multiplexed digital-to-analog converters

Ryutaro Ohira, Masanari Miyamoto, Shinichi Morisaka +4 more

Independent control of numerous electrodes in quantum charge-coupled device architectures presents a significant challenge for wiring and hardware scalability. To address this issue, we demonstrate a voltage control method based on time-division multiplexing (TDM). This approach utilizes a single high-update-rate digital-to-analog converter (DAC) to sequentially generate control signals for multiple electrodes, thereby reducing both the number of required DACs and associated wiring. We experimentally validate this concept by developing a 10-channel system that operates with only two DACs. The developed TDM-based voltage control system is applied to a surface electrode trap, where we successfully trap a single 40Ca+ ion and demonstrate a simple ion transport primitive. This approach offers a resource-efficient and scalable solution for advanced quantum computing systems based on trapped ions.

arXiv:2508.04093•Applied Physics Letters•Dec 8, 2025•1 citation

Demonstration of a Multiplexing Trapped Ion Quantum Processing Unit

F. Anmasser, M. Abu Zahra, K. Schüppert +9 more

A fault-tolerant quantum computer is expected to require thousands of qubits. Trapped ion architectures provide a modular approach where the quantum register is divided into multiple subregisters connected by physically moving the corresponding ions. Transporting ions at scale comes with several challenges such as the need to connect thousands of control lines to an ion trap chip. Multiplexing the required control voltages from few input signals to multiple electrodes offers a solution to this wiring challenge. Here we demonstrate a quantum processing unit that combines a surface ion trap with a time multiplexer via a sample-and-hold technique that initially charges electrodes to fixed voltages and disconnects them during qubit operations. We characterize the unit's performance by measuring motional heating rates below one phonon per second in both open and closed switch configurations. We further characterize the sample and hold process and find that sampling intervals below 50 ms are sufficient to keep expected gate errors from decaying charges during the hold phase below $10^{-4}$. Our results indicate that the multiplexing scheme is compatible with high-fidelity operations.

quant-pharXiv:2605.16010•May 18, 2026•0 citations

Multiplexed Control at Scale for Electrode Arrays in Trapped-Ion Quantum Processors

Ryutaro Ohira, Shinichi Morisaka, Ippei Nakamura +2 more

The scaling up of trapped-ion quantum processors based on the quantum charge-coupled device (QCCD) architecture is difficult owing to the extensive electronics and high-density wiring required to control numerous trap electrodes. In conventional QCCD architectures, each trap electrode is controlled via a dedicated digital-to-analog converter (DAC). The conventional approach places an overwhelming demand on electronic resources and wiring complexity. This is because the number of trap electrodes typically exceeds the number of trapped-ion qubits. This study proposes a method that leverages a high-speed DAC to generate time-division multiplexed signals to control a large-scale QCCD trapped-ion quantum processor. The proposed method replaces conventional DACs with a single high-speed DAC that generates the complete voltage waveforms required to control the trap electrodes, thereby significantly reducing the wiring complexity and overall resource requirements. Based on realistic parameters and commercially available electronics, our analysis demonstrates that a QCCD trapped-ion quantum computer with$\mathbf{1 0, 0 0 0}$trap electrodes can be controlled using only 13 field-programmable gate arrays and 104 high-speed DACs. This is in stark contrast to the$\mathbf{1 0, 0 0 0}$dedicated DACs required by conventional control methods. Consequently, employing this approach, we developed a proof-of-concept electronic system and evaluated its analog output performance.

IEEE International Conference on Quantum Computing and Engineering (QCE)•Aug 30, 2025•1 citation

The DiQuNET Ion-Transport IC of a Trapped-Ion Quantum Processor: A PoC

Stefanie Castillo

[Background] The industrial usefulness of a quantum processor is correlated with its scalability; thus, one of the main focuses of current industrial and academic efforts is to upscale this machine. For trapped-ion quantum processors, some of the most promising scalable architectures require ion transport across surface-segmented traps. Published solutions for the control of ion transport have been mostly developed as bulky, rack-based embedded systems, placed at room temperature outside the vacuum/cryostat chambers, with cables fed in, and with voltages time-multiplexed or broadcast to reach the electrodes of the trap in order to apply the fixed pre-computed raw voltage sets for each fabricated ion trap, where the voltages are tailored to its time- and setup-dependent deposited impurities condition; all of which is neither scalable nor optimally efficient. [Objective] To address this gap, this study proposes a DiQuNET scalable integrated microelectronics solution for ion-transport control. [Methods]We describe the system-level integration strategy and a full engineering development cycle of the device. [Results] This work presents the conception (specification and design) of the ion-transport integrated circuit and the realization (implementation and evaluation) of a proof of concept (TRL 3), which also constitutes a proof of principle of the first DiQuNET compliant integrated circuit. [Conclusion] These results verify and validate the design of an efficient, architecture-scalable, trainable, automated, parametric, and re-configurable proof of concept of the ion-transport integrated circuit. These results support the feasibility, efficiency, and viability potential of the DiQuNET paradigm that uses a distributed set ofautomatamachines to control a quantum processor.

IEEE Access•Jan 1, 2026•1 citation

Toolchain for shuttling trapped-ion qubits in segmented traps

Andreas Conta, Santiago Bogino, Frodo Köhncke +2 more

Scalable trapped-ion quantum computing requires fast and reliable transport of ions through complex, segmented radiofrequency trap architectures without inducing excessive motional excitation. We present a numerical toolchain for the systematic generation of time-dependent electrode voltages enabling fast, low-excitation ion shuttling in segmented radiofrequency traps. Based on a model of the trap electrode geometry, the framework combines an electrostatic field solver, efficient unconstrained optimization, waveform postprocessing, and dynamical simulations of ion motion to compute voltage waveforms that realize prescribed transport trajectories while respecting experimental constraints such as voltage limits and bandwidth. The toolchain supports arbitrary trap geometries, including junctions and multi-zone layouts, and allows for the flexible incorporation of optimization objectives. We provide a detailed assessment of the accuracy of the framework by investigating its numerical stability and by comparing measured and predicted secular frequencies. The framework is optimized for numerical performance, enabling rapid numerical prototyping of trap architectures of increasing complexity. As application examples, we apply the framework to the transport of a potential well along a linear, uniformly segmented trap, and we compute a solution for shuttling a potential well around the corner of an X-type trap junction. The presented approach provides an extensible and highly efficient numerical foundation for designing and validating transport protocols in current and next-generation trapped-ion processors.

quant-pharXiv:2601.08495•Jan 14, 2026•0 citations

Cryo-CMOS Bias-Voltage Generation and Demultiplexing at mK Temperatures for Large-Scale Arrays of Quantum Devices

Job van Staveren, Luc Enthoven, Peter L. Bavdaz +14 more

The rapidly growing number of qubits in semiconductor quantum computers requires a scalable control interface, including the efficient generation of DC bias voltages for gate electrodes. To avoid unrealistically complex wiring between any room-temperature electronics and the cryogenic qubits, this paper presents an integrated cryogenic solution for the bias-voltage generation and distribution for large-scale semiconductor spin-qubit quantum processors. A dedicated cryo-CMOS demultiplexer and a cryo-CMOS DC DAC have been developed in a 22-nm FinFET process to control a co-developed 2D-array designed with 648 Single Hole Transistors (SHTs). Thanks to the dissipation below 120$\mu$W, the whole system operates at temperatures below 70mK in a custom-built electrical/mechanical infrastructure embedded in a standard singlepulse- tube dilution refrigerator. The bias voltages generated by the cryo-CMOS DAC are demultiplexed to sample-and-hold (S/H) structures, allowing to store 96 unique bias voltages over a 3V range with a voltage drift between 60$\mu$V/s and 18 mV/s. This work demonstrates a tight integration at mK-temperatures of cryo- CMOS bias generation and distribution with a dedicated large-scale quantum device. This showcases how this approach simplifies the wiring to the electronics, thus facilitating the scaling up of quantum processors towards the large number of qubits required for a practical quantum computer.

IEEE Transactions on Quantum Engineering•Jan 1, 2025•10 citations
Trapped-ion quantum computers based on the quantum charge-coupled device architecture require on the order of ten trap electrodes per qubit, making the number of vacuum feedthroughs a bottleneck at the system scale. Time-division multiplexed (TDM)-based voltage control for trap electrodes provides a natural route to alleviate this constraint. However, previous studies have been limited to architectural proposals for static trap-potential compensation and room-temperature demonstrations of dynamic-electrode control, leaving cryogenic operation of TDM-based voltage control for static and dynamic electrodes experimentally unexplored. In this study, we develop and cryogenically validate TDM-based voltage control schemes for two distinct electrode classes. For static electrodes used in trap-potential compensation, we implement a 32-channel demultiplexed system operating at approximately 27K, achieving an effective voltage update rate of 37.5kHz with an output range of ±10 V\pm10~\mathrm{V}±10 V per channel. For dynamic electrodes used in ion operations, such as shuttling, we implement a four-channel demultiplexed system operating at approximately 14K, achieving an effective voltage update rate of 1MHz with a comparable output range. These results establish TDM-based voltage control as a practical approach for both electrode classes, providing a path for mitigating the vacuum feedthrough bottleneck in scalable trapped-ion quantum processors.
Independent control of numerous electrodes in quantum charge-coupled device architectures presents a significant challenge for wiring and hardware scalability. To address this issue, we demonstrate a voltage control method based on time-division multiplexing (TDM). This approach utilizes a single high-update-rate digital-to-analog converter (DAC) to sequentially generate control signals for multiple electrodes, thereby reducing both the number of required DACs and associated wiring. We experimentally validate this concept by developing a 10-channel system that operates with only two DACs. The developed TDM-based voltage control system is applied to a surface electrode trap, where we successfully trap a single 40Ca+ ion and demonstrate a simple ion transport primitive. This approach offers a resource-efficient and scalable solution for advanced quantum computing systems based on trapped ions.
A fault-tolerant quantum computer is expected to require thousands of qubits. Trapped ion architectures provide a modular approach where the quantum register is divided into multiple subregisters connected by physically moving the corresponding ions. Transporting ions at scale comes with several challenges such as the need to connect thousands of control lines to an ion trap chip. Multiplexing the required control voltages from few input signals to multiple electrodes offers a solution to this wiring challenge. Here we demonstrate a quantum processing unit that combines a surface ion trap with a time multiplexer via a sample-and-hold technique that initially charges electrodes to fixed voltages and disconnects them during qubit operations. We characterize the unit's performance by measuring motional heating rates below one phonon per second in both open and closed switch configurations. We further characterize the sample and hold process and find that sampling intervals below 50 ms are sufficient to keep expected gate errors from decaying charges during the hold phase below 10−410^{-4}10−4. Our results indicate that the multiplexing scheme is compatible with high-fidelity operations.
The scaling up of trapped-ion quantum processors based on the quantum charge-coupled device (QCCD) architecture is difficult owing to the extensive electronics and high-density wiring required to control numerous trap electrodes. In conventional QCCD architectures, each trap electrode is controlled via a dedicated digital-to-analog converter (DAC). The conventional approach places an overwhelming demand on electronic resources and wiring complexity. This is because the number of trap electrodes typically exceeds the number of trapped-ion qubits. This study proposes a method that leverages a high-speed DAC to generate time-division multiplexed signals to control a large-scale QCCD trapped-ion quantum processor. The proposed method replaces conventional DACs with a single high-speed DAC that generates the complete voltage waveforms required to control the trap electrodes, thereby significantly reducing the wiring complexity and overall resource requirements. Based on realistic parameters and commercially available electronics, our analysis demonstrates that a QCCD trapped-ion quantum computer with10,000\mathbf{1 0, 0 0 0}10,000trap electrodes can be controlled using only 13 field-programmable gate arrays and 104 high-speed DACs. This is in stark contrast to the10,000\mathbf{1 0, 0 0 0}10,000dedicated DACs required by conventional control methods. Consequently, employing this approach, we developed a proof-of-concept electronic system and evaluated its analog output performance.
[Background] The industrial usefulness of a quantum processor is correlated with its scalability; thus, one of the main focuses of current industrial and academic efforts is to upscale this machine. For trapped-ion quantum processors, some of the most promising scalable architectures require ion transport across surface-segmented traps. Published solutions for the control of ion transport have been mostly developed as bulky, rack-based embedded systems, placed at room temperature outside the vacuum/cryostat chambers, with cables fed in, and with voltages time-multiplexed or broadcast to reach the electrodes of the trap in order to apply the fixed pre-computed raw voltage sets for each fabricated ion trap, where the voltages are tailored to its time- and setup-dependent deposited impurities condition; all of which is neither scalable nor optimally efficient. [Objective] To address this gap, this study proposes a DiQuNET scalable integrated microelectronics solution for ion-transport control. [Methods]We describe the system-level integration strategy and a full engineering development cycle of the device. [Results] This work presents the conception (specification and design) of the ion-transport integrated circuit and the realization (implementation and evaluation) of a proof of concept (TRL 3), which also constitutes a proof of principle of the first DiQuNET compliant integrated circuit. [Conclusion] These results verify and validate the design of an efficient, architecture-scalable, trainable, automated, parametric, and re-configurable proof of concept of the ion-transport integrated circuit. These results support the feasibility, efficiency, and viability potential of the DiQuNET paradigm that uses a distributed set ofautomatamachines to control a quantum processor.
Scalable trapped-ion quantum computing requires fast and reliable transport of ions through complex, segmented radiofrequency trap architectures without inducing excessive motional excitation. We present a numerical toolchain for the systematic generation of time-dependent electrode voltages enabling fast, low-excitation ion shuttling in segmented radiofrequency traps. Based on a model of the trap electrode geometry, the framework combines an electrostatic field solver, efficient unconstrained optimization, waveform postprocessing, and dynamical simulations of ion motion to compute voltage waveforms that realize prescribed transport trajectories while respecting experimental constraints such as voltage limits and bandwidth. The toolchain supports arbitrary trap geometries, including junctions and multi-zone layouts, and allows for the flexible incorporation of optimization objectives. We provide a detailed assessment of the accuracy of the framework by investigating its numerical stability and by comparing measured and predicted secular frequencies. The framework is optimized for numerical performance, enabling rapid numerical prototyping of trap architectures of increasing complexity. As application examples, we apply the framework to the transport of a potential well along a linear, uniformly segmented trap, and we compute a solution for shuttling a potential well around the corner of an X-type trap junction. The presented approach provides an extensible and highly efficient numerical foundation for designing and validating transport protocols in current and next-generation trapped-ion processors.
The rapidly growing number of qubits in semiconductor quantum computers requires a scalable control interface, including the efficient generation of DC bias voltages for gate electrodes. To avoid unrealistically complex wiring between any room-temperature electronics and the cryogenic qubits, this paper presents an integrated cryogenic solution for the bias-voltage generation and distribution for large-scale semiconductor spin-qubit quantum processors. A dedicated cryo-CMOS demultiplexer and a cryo-CMOS DC DAC have been developed in a 22-nm FinFET process to control a co-developed 2D-array designed with 648 Single Hole Transistors (SHTs). Thanks to the dissipation below 120μ\muμW, the whole system operates at temperatures below 70mK in a custom-built electrical/mechanical infrastructure embedded in a standard singlepulse- tube dilution refrigerator. The bias voltages generated by the cryo-CMOS DAC are demultiplexed to sample-and-hold (S/H) structures, allowing to store 96 unique bias voltages over a 3V range with a voltage drift between 60μ\muμV/s and 18 mV/s. This work demonstrates a tight integration at mK-temperatures of cryo- CMOS bias generation and distribution with a dedicated large-scale quantum device. This showcases how this approach simplifies the wiring to the electronics, thus facilitating the scaling up of quantum processors towards the large number of qubits required for a practical quantum computer.