Qubit systems based on trapped ultracold ions win one of the leading positions in the quantum computing field, demonstrating quantum algorithms with the highest complexity to date. Surface Paul traps for ion confinement open the opportunity to scale quantum processors to hundreds of qubits and enable high-connectivity manipulations on ions. To fabricate such a system with certain characteristics, the special design of a surface electrode structure is required. The depth of the trapping potential, the stability parameter, the secular frequency and the distance between an ion and the trap surface should be optimized for better performance. Here, we present the optimized design of a relatively simple surface trap that allows several important high-fidelity primitives: tight ion confinement, laser cooling, and wide optical access. The suggested trap design also allows us to perform an important basic operation, namely, splitting an ion chain into two parts.
Qubit systems based on trapped ultracold ions win one of the leading positions in the quantum computing field, demonstrating quantum algorithms with the highest complexity to date. Surface Paul traps for ion confinement open the opportunity to scale quantum processors to hundreds of qubits and enable high-connectivity manipulations on ions. To fabricate such a system with certain characteristics, the special design of a surface electrode structure is required. The depth of the trapping potential, the stability parameter, the secular frequency and the distance between an ion and the trap surface should be optimized for better performance. Here, we present the optimized design of a relatively simple surface trap that allows several important high-fidelity primitives: tight ion confinement, laser cooling, and wide optical access. The suggested trap design also allows us to perform an important basic operation, namely, splitting an ion chain into two parts.
We describe a new electrode design for a grooved surface-electrode ion trap, which is fabricated in printed-circuit-board technology with segmented electrodes. This design allows a laser beam to get through the central groove to avoid optical access blocking and laser scattering from the ion trap surface. The confining potentials are modeled both analytically and numerically. We optimize the radio frequency (rf) electrodes and dc electrodes to achieve the maximum trap depth for a given ion height above the trap electrodes. We also compare our design with the reality ion chip MI I for practical considerations. Comparison results show that our design is superior to MI I. This ion trap design may form the basis for large scale quantum computers or parallel quadrupole mass spectrometers.
Trapped ions in Paul traps (radio frequency ion traps) are a promising candidate for the realization of a quantum computer. To date, experimental demonstrations of quantum computing and information processing with trapped ions have been limited to small numbers of quantum bits (qubits). The most prominent challenge to realise ion-trap quantum computation is to scale the system and control a large number of trapped ions coherently. Surface-electrode ion trap designs which are amenable to various microfabrication techniques offer a path to achieve this. In this work, design, fabrication and key operations of two types of surface-electrode ion traps, i.e. a Y-junction trap and a two-dimensional (2D) hexagonal lattice trap developed towards scaling ion-trap architectures, are presented. The steps involved in the fabrication of the ion-trap devices included photolithography, wet etch (hydrofluoric acid etch) and dry etch (deep reactive ion and inductively coupled plasma etching), and metal evaporation. The devices were fabricated on SOI substrates with different buried oxide thicknesses (i.e. 5 µm and 10 µm) and different metals for the trap electrodes (i.e. gold and aluminium). An extremely high-breakdown voltage up to 1 kV was measured in vacuum for the SOI-built test devices with a 10 µm-thick buried oxide formed by oxide film-to-oxide film bonding process. This is attributed to the deep V-shaped undercut profile of the buried oxide layer which resulted in a large breakdown path length, and so mitigating surface breakdown effects. Owing to the V-shaped undercut profile, the surface breakdown voltage was improved by 15% for the devices fabricated on SOI substrates with a 10 µm-thick buried oxide. In the first experiment, the demonstration of ytterbium (174Yb+) ion trapping in the 2D hexagonal lattice trap is achieved with a relatively long lifetime of a laser-cooled ion up to 90 minutes and ≤ 5 minutes without cooling in ultra-high vacuum system. The 2D lattice trap design allows for reliable trapping of 2D ion lattices, rudimentary shuttling between lattice sites and deterministic introducing of defects into the ion lattice. Based on all these abilities, such a 2D lattice trap with the predicted reduction of lattice spacing down to 32 µm can be configured as a versatile architecture for 2D quantum simulations with trapped ions. In the second experiment, microparticle trapping in the 2D lattice trap, performed in air, is achieved with the longest trapping lifetime of 60 minutes. Both gold and aluminium-coated electrodes also lead to comparable trapping performances. Furthermore, the in situ levitation of microparticles is successfully demonstrated at the maximum levitation height of 30 µm. This ability provides additional control on the trapping height which increases the overall functionality of the 2D lattice trap.
Trapped-ion applications, such as in quantum information, precision measurements, optical clocks, and mass spectrometry, rely on specialized high-performance ion traps. The latter applications typically employ traditional machining to customize macroscopic 3D Paul traps, while quantum information processing experiments usually rely on photo-lithographic techniques to miniaturize the traps and meet scalability requirements. Using photolithography, however, it is challenging to fabricate the complex three-dimensional electrode structures required for optimal confinement. Here we address these limitations by adopting a high-resolution 3D printing technology based on two-photon polymerization supporting fabrication of large arrays of high-performance miniaturized 3D traps. We show that 3D-printed ion traps combine the advantages of traditionally machined 3D traps with the miniaturization provided by photolithography by confining single calcium ions in a small 3D-printed ion trap with radial trap frequencies ranging from 2 MHz to 24 MHz. The tight confinement eases ion cooling requirements and allows us to demonstrate high-fidelity coherent operations on an optical qubit after only Doppler cooling. With 3D printing technology, the design freedom is drastically expanded without sacrificing scalability and precision so that ion trap geometries can be optimized for higher performance and better functionality.
Scaling up and effective cooling of ions in surface ion trap are central challenges in quantum computing and quantum simulation with trapped ions. In this theoretical study, we propose a versatile surface ion trap. In the manipulation zone of our trap, a symmetric seven-wire geometry enables innate principle-axes rotation of two parallel linear ion chains, which facilitates the cooling of ions along all principle trap axes. To alleviate contaminating the manipulation zone during ion loading, a symmetric five-wire geometry is designed as the loading zone. And a "fork junction" connects the loading and manipulation zones, which also enables the shuttling and reordering of ions. A multi-objective optimization procedure suitable for arbitrary junction designs is described in detail, and we present the corresponding optimal results for the key components of our trap. The proposed versatile trap can be used in the construction of large-scale ion quantum processors. The trap also can be used as the multi-ion-mixer or the efficient ion beam splitter, which has the potential applications in quantum simulation and quantum computing, the research of 2D dimensional ion crystals and the guides of quantum microscope, like an electron beam splitter used for quantum matter-wave optics experiments. Interesting topics involving the spin-spin interactions between two ion chains can also be simulated in our trap.
Ion traps are a foundational technology in quantum information processing, precision spectroscopy and foundational physics tests. At the heart of their performance is the inhibition of micromotion, an oscillation of ions through imperfect trapping potentials, that restricts the laser cooling efficiency, coherence times, and the accuracy of measurements. The paper provides a systematic computational analysis of four different electrode geometries (Linear Paul, Segmented, Surface and Ring) in 24 different RF / DC configurations (C01-C24) and 13 performance parameters that comprise trap depth (0.62 1.48 eV), radial secular frequency (1,100 1 Multi-objective optimization with weighted scoring of these metrics indicates that Ring trap geometry scores the highest total (80.2/100), followed by Linear Paul (72.0), Segmented (67.0) and Surface (55.1) configurations. ANOVA (one-way) statistically verified the presence of statistically significant inter-geometry differences in micro-motions amplitude (F = 18.43, p < .001) and cooling efficiency (F = 22.17, p < .001), with Tukey HSD post-hoc revealed that the most significant difference was between the Ring and the Surface. The Pearson correlation analysis shows that RF drive voltage and micromotion amplitude (r = -0.94 to -0.99) and cooling efficiency and micromotion (r = -1.00) have near-perfect inverse correlations, which prove that the quality of confinement is regulated by electrode geometry, RF amplitude, and spacing. These results give quantitative design principles of next-generation ion traps in quantum computing and atomic clock. Keywords: ion trap, micromotion minimization, RF/DC electrode optimization, laser cooling, Mathieu stability, secular frequency, quantum computing
Surface ion traps confining and manipulating tens of ion qubits have become the leading platform for quantum processors with high quantum volume. These devices employ the Quantum Charge-Coupled Device (QCCD) architecture, wherein multiple trapping zones are linked by an on-chip transport network that shuttles ion chains, enabling full connectivity through physical ion transport in a plane parallel to the chip surface. The ability to move ions perpendicular to this plane can offer additional advantages, including tuning the laser-ion interaction strength, systematic studies of surface-induced heating mechanisms, and precise alignment with a mode of an external optical cavity. We introduce an "escalator" - a geometrically optimized transition between trapping zones of different confinement heights - and present a comparative analysis of two "elevator" configurations that reposition the RF null dynamically via additional electrode voltages. Both approaches enable nearly a twofold change in the ion confinement height above the chip surface.