We use a floating tunable coupler to mediate interactions between qubits on separate chips to build a modular architecture. We demonstrate three different designs of multichip tunable couplers using vacuum-gap capacitors or superconducting indium-bump bonds to connect the coupler to a microwave line on a common substrate and then connect to the qubit on the next chip. We show that the zero-coupling condition between qubits on separate chips can be achieved in each design and that the relaxation rates for the coupler and qubits are not noticeably affected by the extra circuit elements. Finally, we demonstrate two-qubit gate operations with fidelity at the same level as qubits with a tunable coupler on a single chip. Using one or more indium bonds does not degrade qubit coherence or impact the performance of two-qubit gates.
We use a floating tunable coupler to mediate interactions between qubits on separate chips to build a modular architecture. We demonstrate three different designs of multichip tunable couplers using vacuum-gap capacitors or superconducting indium-bump bonds to connect the coupler to a microwave line on a common substrate and then connect to the qubit on the next chip. We show that the zero-coupling condition between qubits on separate chips can be achieved in each design and that the relaxation rates for the coupler and qubits are not noticeably affected by the extra circuit elements. Finally, we demonstrate two-qubit gate operations with fidelity at the same level as qubits with a tunable coupler on a single chip. Using one or more indium bonds does not degrade qubit coherence or impact the performance of two-qubit gates.
Abstract Three-dimensional integration technologies such as flip-chip bonding are a key prerequisite to realize large-scale superconducting quantum processors. Modular architectures, in which circuit elements are spread over multiple chips, can further improve scalability and performance by enabling the integration of elements with different substrates or fabrication processes, by increasing the fabrication yield of completed devices, and by physically separating the qubits onto distinct modules to avoid correlated errors mediated by a common substrate. We present a design for a multi-chip module comprising one carrier chip and four qubit modules. Measuring two of the qubits, we analyze the readout performance, finding a mean three-level state-assignment error of 9×10−3 9 × 10 − 3 in 200 ns. We calibrate single-qubit gates and measure a mean simultaneous randomized benchmarking error of 6×10−4 6 × 10 − 4 , consistent with the coherence times of the qubits. Using a wiring-efficient static inter-module coupler featuring galvanic inter-chip transitions, we demonstrate a controlled-Z two-qubit gate in 100 ns with an error of 7×10−3 7 × 10 − 3 extracted from interleaved randomized benchmarking. Three-dimensional integration, as presented here, will continue to contribute to improving the performance of gates and readout as well as increasing the qubit count in future superconducting quantum processors.
We have proposed and experimentally verified a tunable interqubit coupling scheme for large-scale integration of superconducting qubits. The key feature of the scheme is the insertion of connecting pads between the qubit and tunable coupling element. In such a way, the distance between two qubits can be increased considerably to a few millimeters, leaving enough space for arranging control lines, readout resonators, and other necessary structures. The increased interqubit distance provides more wiring space for the flip-chip process and reduces crosstalk between qubits and from control lines to qubits. We use the term tunable coupler with capacitively connecting pad (TCCP) to name the tunable coupling part that consists of a transmon coupler and capacitively connecting pads. With the different placement of connecting pads, different TCCP architectures can be realized. We have designed and fabricated a few multiqubit devices in which TCCP is used for coupling. The measured results show that the performance of the qubits coupled by TCCP, such as T1 and T2, was similar to that of traditional transmon qubits without TCCP. Meanwhile, our TCCP also exhibited a wide tunable range of the effective coupling strength and a low residual ZZ interaction between the qubits by properly tuning parameters on the design. Finally, we successfully implemented an adiabatic controlled-Z gate with TCCP. Furthermore, by introducing TCCP, we also discuss the realization of the flip-chip process and tunable coupling qubits between different chips.
Abstract We have integrated single and coupled superconducting transmon qubits into flip-chip modules. Each module consists of two chips—one quantum chip and one control chip—that are bump-bonded together. We demonstrate time-averaged coherence times exceeding 90 μs, single-qubit gate fidelities exceeding 99.9%, and two-qubit gate fidelities above 98.6%. We also present device design methods and discuss the sensitivity of device parameters to variation in interchip spacing. Notably, the additional flip-chip fabrication steps do not degrade the qubit performance compared to our baseline state-of-the-art in single-chip, planar circuits. This integration technique can be extended to the realisation of quantum processors accommodating hundreds of qubits in one module as it offers adequate input/output wiring access to all qubits and couplers.
Scaling superconducting quantum processors beyond the constraints of monolithic planar architectures is essential for fault-tolerant quantum computation. Here we demonstrate a three-dimensional (3D) integrated superconducting quantum processor in which two qubit chips are vertically stacked on opposing sides of a carrier chip and galvanically connected via multilayer flip-chip bonding. Intrachip qubit coupling is mediated by planar tunable couplers, whereas interchip coupling is enabled by vertical tunable couplers embedded in the carrier chip. Randomized benchmarking reveals simultaneous single-qubit gate fidelities of 99.87 % with negligible crosstalk, and controlled-Z gates achieve an average fidelity of 97.5 % for both intrachip and interchip operations. We further demonstrate high-fidelity Bell-state preparation and coherent generation of a four-qubit W state, confirming the architecture's capability for interchip entanglement distribution. These results establish vertical coupling as a promising pathway toward scalable quantum processors compatible with advanced quantum error-correcting codes.
In addition to striving to assemble more and more qubits in a single monolithic quantum device, taking a modular design strategy may mitigate numerous engineering challenges for achieving large-scalable quantum processors with superconducting qubits. Nevertheless, a major challenge in the modular quantum device is how to realize high-fidelity entanglement operations on qubits housed in different modules while preserving the desired isolation between modules. In this work, we propose a conceptual design of a modular quantum device, where nearby modules are spatially separated by centimeters. In principle, each module can contain tens of superconducting qubits and can be separately fabricated, characterized, packaged, and replaced. By introducing a bridge module between nearby qubit modules and taking the coupling scheme utilizing a tunable bus, tunable coupling of qubits that are housed in nearby qubit modules could be realized. Given physically reasonable assumptions, we expect that sub-100-ns two-qubit gates for qubits housed in nearby modules, which are spatially separated by more than two centimeters could be obtained. In this way, the inter-module gate operations are promising to be implemented with gate performance comparable with that of intra-module gate operations. Moreover, with the help of through-silicon vias technologies, this long-range coupling scheme may also allow one to implement inter-module couplers in a multi-chip stacked processor. Thus, the tunable longer-range coupling scheme and the proposed modular architecture may provide a promising foundation for solving challenges toward large-scale quantum information processing with superconducting qubits.
The path toward practical superconducting quantum processors requires the integration of a large number of high-performance qubits. Modular architectures could offer a way to address the scaling limitations of monolithic designs by partitioning a large quantum processor into physically separated modules, or chiplets, linked through long-range interconnects. In this context, although fluxonium qubits have emerged as a compelling platform for quantum computing due to their long coherence times and high-fidelity gates, existing coupling schemes remain restricted to qubits in close proximity on a single chip. This limitation inherently precludes the long-range interconnects essential for modular integration. In this work, we propose a long-range tunable coupler designed to interconnect fluxonium qubits separated by more than one centimeter, thereby supporting the realization of modular fluxonium quantum processors. Under realistic assumptions, the proposed coupler has the potential to achieve inter-module two-qubit gate performance, specifically sub-100-ns gates with intrinsic errors below 10−4, comparable to that of intra-module (intra-chiplet) gates, while enabling modular integration with low quantum crosstalk, a key requirement for scalable systems. We further discuss the integration of this coupler into modular fluxonium lattices and explore its feasibility for achieving the higher connectivity and longer coupling range required for complex quantum error correction codes. This work could contribute to the development of large-scale fluxonium quantum processors by bridging their demonstrated potential with modular scalability.