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arXiv:2112.02717 · Quantum Science and Technology

Building blocks of a flip-chip integrated superconducting quantum processor

Sandoko Kosen, Hang-Xi Li, Marcus Rommel, Daryoush Shiri, Christopher Warren, Leif Grönberg, Jaakko Salonen, Tahereh Abad, Janka Biznárová, Marco Caputo, Liangyu Chen, Kestutis Grigoras, Göran Johansson, Anton Frisk Kockum, Christian Križan, Daniel Pérez Lozano, Graham J. Norris, Amr Osman, Jorge Fernández-Pendás, Alberto Ronzani, Anita Fadavi Roudsari, Slawomir Simbierowicz, Giovanna Tancredi, Andreas J. Wallraff, Christopher Eichler, Joonas Govenius, Jonas Bylander

Published May 25, 2022• 88 citations
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Abstract

Abstract We have integrated single and coupled superconducting transmon qubits into flip-chip modules. Each module consists of two chips—one quantum chip and one control chip—that are bump-bonded together. We demonstrate time-averaged coherence times exceeding 90 μs, single-qubit gate fidelities exceeding 99.9%, and two-qubit gate fidelities above 98.6%. We also present device design methods and discuss the sensitivity of device parameters to variation in interchip spacing. Notably, the additional flip-chip fabrication steps do not degrade the qubit performance compared to our baseline state-of-the-art in single-chip, planar circuits. This integration technique can be extended to the realisation of quantum processors accommodating hundreds of qubits in one module as it offers adequate input/output wiring access to all qubits and couplers.

DOI
10.1088/2058-9565/ac734b

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Abstract We have integrated single and coupled superconducting transmon qubits into flip-chip modules. Each module consists of two chips—one quantum chip and one control chip—that are bump-bonded together. We demonstrate time-averaged coherence times exceeding 90 μs, single-qubit gate fidelities exceeding 99.9%, and two-qubit gate fidelities above 98.6%. We also present device design methods and discuss the sensitivity of device parameters to variation in interchip spacing. Notably, the additional flip-chip fabrication steps do not degrade the qubit performance compared to our baseline state-of-the-art in single-chip, planar circuits. This integration technique can be extended to the realisation of quantum processors accommodating hundreds of qubits in one module as it offers adequate input/output wiring access to all qubits and couplers.
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Scaling superconducting quantum processors beyond the constraints of monolithic planar architectures is essential for fault-tolerant quantum computation. Here we demonstrate a three-dimensional (3D) integrated superconducting quantum processor in which two qubit chips are vertically stacked on opposing sides of a carrier chip and galvanically connected via multilayer flip-chip bonding. Intrachip qubit coupling is mediated by planar tunable couplers, whereas interchip coupling is enabled by vertical tunable couplers embedded in the carrier chip. Randomized benchmarking reveals simultaneous single-qubit gate fidelities of 99.87 % with negligible crosstalk, and controlled-Z gates achieve an average fidelity of 97.5 % for both intrachip and interchip operations. We further demonstrate high-fidelity Bell-state preparation and coherent generation of a four-qubit WWW state, confirming the architecture's capability for interchip entanglement distribution. These results establish vertical coupling as a promising pathway toward scalable quantum processors compatible with advanced quantum error-correcting codes.
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We have demonstrated superconducting interconnect technologies that enable a variety of flip-chip 3D integrated structures and packages compatible with high-coherence superconducting qubits. Superconducting indium micro-bumps and underbump metal (UBM) were used to join superconducting qubit chips to superconducting readout and control modules while maintaining high qubit coherence (T1, T2,echo> 20 μs) in the presence of capacitive and inductive coupling between the chips. Scanning electron microscope, X-ray, infrared and confocal microscopy were used to investigate the micro-structure, alignment accuracy, and parallelism of flip-chip qubits. The superconducting readout and control modules can accommodate both niobium and aluminum-based circuit and amplifier fabrication processes, including shadow-evaporated aluminum or Nb/Al-AlOx/Nb trilayer Josephson junctions (JJs). We present results for up to 16 active superconducting chips having trilayer junctions bonded to a passive superconducting module. The I-V characteristics and switching behavior were measured for flip-chip-connected JJ arrays with 40-20,000 JJs. Our approach maintained chip-level junction critical current and qubit coherence, demonstrating it to be a viable approach to building larger quantum computing systems. This paper also discusses packaging approaches to developing a quantum-to-classical interface in a cryogenic environment with multiple temperature stages.
Flip-chip integration offers a promising route toward scalable superconducting quantum processors and hybrid semiconductor-superconductor quantum devices. We develop a three-dimensional transmon architecture using electroplated indium in which the qubit electric field is shared nearly equally between two bump-bonded substrates while maintaining low participation at the indium-bump interface. The resulting geometry is well suited for future hybrid qubits, enabling the integration of distinct material platforms while minimizing sensitivity to bump-interface loss. Using this platform, we evaluate electroplated indium interconnects for superconducting quantum circuits. Flip-chip transmons incorporating electroplated indium bumps exhibit qubit quality factors around 10610^6106. In addition, a systematic study of coplanar-waveguide resonators is used to identify losses associated with the electroplating process. In particular, we find that surface losses associated with the gold-layer, used to enable good electric contact with the indium, is likely the primary contributor to the qubit decay rate. These results demonstrate the compatibility of electroplated indium technology with high-coherence superconducting circuits and establish a promising platform for three-dimensional hybrid quantum integration.