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arXiv:2305.10956 · Scientific Reports

Fabrication of Al/AlOx/Al junctions with high uniformity and stability on sapphire substrates

Yuzhen Zheng, Shuming Li, Zengqian Ding, Kanglin Xiong, Jiagui Feng, Hui Yang

Published Jul 22, 2023• 10 citations
arXivHTMLPDF

Abstract

Abstract Tantalum and aluminum on sapphire are widely used platforms for qubits of long coherent time. As quantum chips scale up, the number of Josephson junctions on Sapphire increases. Thus, both the uniformity and stability of the junctions are crucial to quantum devices, such as scalable superconducting quantum computer circuit, and quantum-limited amplifiers. By optimizing the fabrication process, especially, the conductive layer during the electron beam lithography process, Al/AlOx/Al junctions of sizes ranging from 0.0169 to 0.04 µm2 on sapphire substrates were prepared. The relative standard deviation of room temperature resistances (RN) of these junctions is better than 1.7% on 15 mm×15 mm chips, and better than 2.66% on 2 inch wafers, which is the highest uniformity on sapphire substrates has been reported. The junctions are robust and stable in resistances as temperature changes. The resistances increase by the ratio of 9.73% relative to RN as the temperature ramp down to 4K, and restore their initial values in the reverse process as the temperature ramps back to RT. After being stored in a nitrogen cabinet for 100 days, the resistance of the junctions changed by1.16% in average. The demonstration of uniform and stable Josephson junctions in large area paves the way for the fabrication of superconducting chip of hundreds of qubits on sapphire substrates.

DOI
10.1038/s41598-023-39052-2

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Abstract Tantalum and aluminum on sapphire are widely used platforms for qubits of long coherent time. As quantum chips scale up, the number of Josephson junctions on Sapphire increases. Thus, both the uniformity and stability of the junctions are crucial to quantum devices, such as scalable superconducting quantum computer circuit, and quantum-limited amplifiers. By optimizing the fabrication process, especially, the conductive layer during the electron beam lithography process, Al/AlOx/Al junctions of sizes ranging from 0.0169 to 0.04 µm2 on sapphire substrates were prepared. The relative standard deviation of room temperature resistances (RN) of these junctions is better than 1.7% on 15 mm×15 mm chips, and better than 2.66% on 2 inch wafers, which is the highest uniformity on sapphire substrates has been reported. The junctions are robust and stable in resistances as temperature changes. The resistances increase by the ratio of 9.73% relative to RN as the temperature ramp down to 4K, and restore their initial values in the reverse process as the temperature ramps back to RT. After being stored in a nitrogen cabinet for 100 days, the resistance of the junctions changed by1.16% in average. The demonstration of uniform and stable Josephson junctions in large area paves the way for the fabrication of superconducting chip of hundreds of qubits on sapphire substrates.
Superconducting qubits stand as a pivotal platform for quantum computing, where scalable fabrication is crucial for building complex quantum circuits. Here, we develop a fabrication process for Nb/Al-AlOx/Nb tri-layer Josephson junctions on 4-inch silicon wafers using full-stepper lithography. Utilizing this process, we have produced both transmon and C-shunt flux qubits. The well-behavedI-Vcharacteristics of junction arrays containing up to 1000 junctions highlight the excellent uniformity and scalability of our process. Furthermore, by introducing a RIE pre-etch before BOE treatment to remove most of the SiO2insulator, we have suppressed dielectric loss and increased the coherence time of the Nb-based transmon qubit by almost 10 times, achieving a quality factor comparable to state-of-the-art Nb-based qubits on sapphire substrates. Given its compatibility with silicon technology, our method paves the way for the integration of multi-qubit processors and the co-fabrication of complex quantum circuits.
Superconducting qubits based on Al/AlOx/Al Josephson junction are one of the most promising candidates for the physical implementation of universal quantum computers. Due to scalability and compatibility with the state-of-the-art nanoelectronic processes one can fabricate hundreds of qubits on a single silicon chip. However, decoherence in these systems caused by two-level-systems in amorphous dielectrics, including a tunneling barrier AlOx, is one of the major problems. We report on a Josephson junction thermal annealing process development to crystallize an amorphous barrier oxide (AlOx). The dependences of the thermal annealing parameters on the room temperature resistance are obtained. The developed method allows not only to increase the Josephson junction resistance by 175%, but also to decrease by 60% with precisions of 10% in Rn. Finally, theoretical assumptions about the structure modification in tunnel barrier are proposed. The suggested thermal annealing approach can be used to form a stable and reproducible tunneling barriers and scalable frequency trimming for a widely used fixed-frequency transmon qubits.
We introduce a simplified fabrication technique for Josephson junctions and demonstrate superconducting Xmon qubits with T1 relaxation times averaging above 50 μs (Q>1.5×106). Current shadow-evaporation techniques for aluminum-based Josephson junctions require a separate lithography step to deposit a patch that makes a galvanic, superconducting connection between the junction electrodes and the circuit wiring layer. The patch connection eliminates parasitic junctions, which otherwise contribute significantly to dielectric loss. In our patch-integrated cross-type junction technique, we use one lithography step and one vacuum cycle to evaporate both the junction electrodes and the patch. This eliminates a key bottleneck in manufacturing superconducting qubits by reducing the fabrication time and cost. In a study of more than 3600 junctions, we show an average resistance variation of 3.7% on a wafer that contains forty 0.5×0.5-cm2 chips, with junction areas ranging between 0.01 and 0.16 μm2. The average on-chip spread in resistance is 2.7%, with 20 chips varying between 1.4% and 2%. For the junction sizes used for transmon qubits, we deduce a wafer-level transition-frequency variation of 1.7%–2.5%. We show that 60%–70% of this variation is attributed to junction-area fluctuations, while the rest is caused by tunnel-junction inhomogeneity. Such high frequency predictability is a requirement for scaling-up the number of qubits in a quantum computer.
Superconducting qubits in today's quantum processing units are typically fabricated with angle-evaporated aluminum--aluminum-oxide--aluminum Josephson junctions. However, there is an urgent need to overcome the limited reproducibility of this approach when scaling up the number of qubits and junctions. Fabrication methods based on subtractive patterning of superconductor--insulator--superconductor trilayers, used for more classical large-scale Josephson junction circuits, could provide the solution but they in turn often suffer from lossy dielectrics incompatible with high qubit coherence. In this work, we utilize native aluminum oxide as a sidewall passivation layer for junctions based on aluminum--aluminum-oxide--niobium trilayers, and use such junctions in qubits. We design the fabrication process such that the few-nanometer-thin native oxide is not exposed to oxide removal steps that could increase its defect density or hinder its ability to prevent shorting between the leads of the junction. With these junctions, we design and fabricate transmon-like qubits and measure time-averaged coherence times up to 30 μμμs at a qubit frequency of 5 GHz, corresponding to a qubit quality factor of one million. Our process uses subtractive patterning and optical lithography on wafer scale, enabling high throughput in patterning. This approach provides a scalable path toward fabrication of superconducting qubits on industry-standard platforms.
Abstract Quantum bits, or qubits, are an example of coherent circuits envisioned for next-generation computers and detectors. A robust superconducting qubit with a coherent lifetime of O(100 µs) is the transmon: a Josephson junction functioning as a non-linear inductor shunted with a capacitor to form an anharmonic oscillator. In a complex device with many such transmons, precise control over each qubit frequency is often required, and thus variations of the junction area and tunnel barrier thickness must be sufficiently minimized to achieve optimal performance while avoiding spectral overlap between neighboring circuits. Simply transplanting our recipe optimized for single, stand-alone devices to wafer-scale (producing 64, 1x1 cm dies from a 150 mm wafer) initially resulted in global drifts in room-temperature tunneling resistance of ± 30%. Inferring a critical current I c variation from this resistance distribution, we present an optimized process developed from a systematic 38 wafer study that results in < 3.5% relative standard deviation (RSD) in critical current ( ≡ σ I c / I c ) for 3000 Josephson junctions (both single-junctions and asymmetric SQUIDs) across an area of 49 cm2. Looking within a 1x1 cm moving window across the substrate gives an estimate of the variation characteristic of a given qubit chip. Our best process, utilizing ultrasonically assisted development, uniform ashing, and dynamic oxidation has shown σ I c / I c = 1.8% within 1x1 cm, on average, with a few 1x1 cm areas having σ I c / I c < 1.0% (equivalent to σ f / f < 0.5%). Such stability would drastically improve the yield of multi-junction chips with strict critical current requirements.
We present a fabrication scheme and testing results for epitaxial sub-micrometer Josephson junctions. The junctions are made using a high-temperature (1170 K) "via process" yielding junctions as small as 0.8 mu m in diameter by use of optical lithography. Sapphire (Al2O3) tunnel-barriers are grown on an epitaxial Re/Ti multilayer base-electrode. We have fabricated devices with both Re and Al top electrodes. While room-temperature (295 K) resistance versus area data are favorable for both types of top electrodes, the low-temperature (50 mK) data show that junctions with the Al top electrode have a much higher subgap resistance. The microwave loss properties of the junctions have been measured by use of superconducting Josephson junction qubits. The results show that high subgap resistance correlates to improved qubit performance.