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arXiv:2009.09749 · Applied Physics Letters

Superconducting tunnel junction fabrication on three-dimensional topography based on direct laser writing

Samuli Heiskanen, Ilari J. Maasilta

Published Dec 7, 2020• 3 citations
arXivHTMLPDF

Abstract

Superconducting junctions are widely used in a multitude of applications ranging from quantum information science and sensing to solid-state cooling. Traditionally, such devices must be fabricated on flat substrates using standard lithographic techniques. In this study, we demonstrate a highly versatile method that allows for superconducting junctions to be fabricated on a more complex topography. It is based on maskless direct laser writing and two-photon lithography, which allows writing in 3D space. We show that high-quality normal metal–insulator–superconductor tunnel junctions can be fabricated on top of a 20-μm-tall three-dimensional topography. Combined with conformal resist coating methods, this technique could allow sub-micron device fabrication on almost any type of topography in the future.

DOI
10.1063/5.0029273

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Superconducting junctions are widely used in a multitude of applications ranging from quantum information science and sensing to solid-state cooling. Traditionally, such devices must be fabricated on flat substrates using standard lithographic techniques. In this study, we demonstrate a highly versatile method that allows for superconducting junctions to be fabricated on a more complex topography. It is based on maskless direct laser writing and two-photon lithography, which allows writing in 3D space. We show that high-quality normal metal–insulator–superconductor tunnel junctions can be fabricated on top of a 20-μm-tall three-dimensional topography. Combined with conformal resist coating methods, this technique could allow sub-micron device fabrication on almost any type of topography in the future.
A method to fabricate large-area superconducting hybrid tunnel junctions with a suspended central normal metal part is presented. The samples are fabricated by combining photo-lithography and chemical etch of a superconductor—insulator—normal metal multilayer. The process involves few fabrication steps, is reliable and produces extremely high-quality tunnel junctions. Under an appropriate voltage bias, a significant electronic cooling is demonstrated. We analyze semi-quantitatively the thermal behavior of a typical device.
We have developed a fabrication technique for Josephson junctions that employs a three-dimensional patterned, low-loss substrate instead of commonly used organic resists. The technique enables the fabrication of high-quality trilayer junctions from a wide range of geometries and materials, including high-melting-point superconductors such as tantalum or niobium. The junction electrodes are free from intentionally introduced oxides and organic materials, which are known sources of decoherence. We fabricate and characterize underdamped Nb/AlOx/Nb junctions of different sizes in several geometries.
Abstract In this Perspective article, we evaluate the current state of research on the use of focused electron and ion beams to directly fabricate nanoscale superconducting devices with application in quantum technologies. First, the article introduces the main superconducting devices and their fabrication by means of standard lithography techniques such as optical lithography and electron beam lithography. Then, focused ion beam patterning of superconductors through milling or irradiation is shown, as well as the growth of superconducting devices by means of focused electron and ion beam induced deposition. We suggest that the key benefits of these resist-free direct-growth techniques for quantum technologies include the ability to make electrical nanocontacts and circuit edit, fabrication of high-resolution superconducting resonators, creation of Josephson junctions and superconducting quantum interference device (SQUIDs) for on-tip sensors, patterning of high-Tc SQUIDs and other superconducting circuits, and the exploration of fluxtronics and topological superconductivity.
The objective of our research is to develop a machine-aligned technique for the definition and insulation of Nb/Al-AlO/sub x//Nb superconducting-insulating-superconducting (SIS) tunnel junctions with areas as small as 0.2 /spl mu/m/sup 2/. The fabrication of such ultrasmall area planar SIS junctions had previously only been achieved using electron beam lithography (JPL). Typical techniques for the fabrication of micron-scale SIS junctions involve a self-aligned resist lift-off process. The resist pattern is used to define both the junction counter-electrode and the insulation field that separates the wiring layer from the base electrode. The wiring layer contacts the junction counter-electrode through a via in the insulation field that is created during resist liftoff. In our process, the junction is defined and insulated in separate steps; a via through the insulation layer to the junction is aligned and defined using a gallium focused ion beam with nanometer spot-size. Such small area SIS junctions have potential applications in high frequency SIS mixer circuits. They may also be used in experiments to investigate quantum coherence in superconducting circuits and may even serve as the key elements in future superconducting quantum computers.
Sub-μm\mu\hbox{m}μm Josephson Junctions for Superconducting Quantum Devices
For high-performance superconducting quantum devices based on Josephson junctions (JJs), decreasing lateral sizes is of great importance. Fabrication of sub-μm JJs is challenging, due to nonflat surfaces with step heights of up to several 100 nm generated during the fabrication process. We have refined a fabrication process with significantly decreased film thicknesses, resulting in almost flat surfaces at intermediate steps during the JJ definition. In combination with a mix-and-match process, combining electron-beam lithography and conventional photolithography, we can fabricate JJs with lateral dimensions down to 0.023 μm2. We propose this refined process as an alternative to the commonly used chemical-mechanical polishing procedure. Transport measurements of JJs, having critical-current densities ranging from 50 to 104A/cm2, are presented at 4.2 K. Our JJ process yields excellent quality parameters, Rsg/RNup to ~ 50, Vmfrom 15 to 80 mV and Vgapup to 2.81 mV, and also allows the fabrication of high-quality, sub-μm wide, long JJs (LJJs) for the study of Josephson vortex behavior. The developed technique can also be used for similar multilayer processes and is very promising for fabricating sub- μm JJs for quantum devices such as SQUIDs, qubits, and SIS mixers.
Fabrication of sub-micron Josephson junctions is demonstrated using standard processing techniques for high-coherence, superconducting qubits. These junctions are made in two separate lithography steps with normal-angle evaporation. Most significantly, this work demonstrates that it is possible to achieve high coherence with junctions formed on aluminum surfaces cleaned in situ with Ar milling before the junction oxidation. This method eliminates the angle-dependent shadow masks typically used for small junctions. Therefore, this is conducive to the implementation of typical methods for improving margins and yield using conventional CMOS processing. The current method uses electron-beam lithography and an additive process to define the top and bottom electrodes. Extension of this work to optical lithography and subtractive processes is discussed.