Network architecture for a topological quantum computer in silicon
Brandon Buonacorsi, Zhenyu Cai, Eduardo B Ramirez, Kyle Willick, Sean M. Walker, Jiahao Li, Benjamin D. Shaw, Xiaosi Xu, Simon C. Benjamin, Jonathan Baugh
Abstract A design for a large-scale surface code quantum processor based on a node/network approach is introduced for semiconductor quantum dot spin qubits. The minimal node contains only seven quantum dots, and nodes are separated on the micron scale, creating useful space for wiring interconnects and integration of conventional transistor circuits. Entanglement is distributed between neighbouring nodes by loading spin singlets locally and then shuttling one member of the pair through a linear array of empty dots. A node contains one data qubit, two ancilla qubits, and additional dots to facilitate electron shuttling and measurement of the ancillas. A four-node GHZ state is realized by sharing three internode singlets followed by local gate operations and ancilla measurements. Further local operations produce an X or Z stabilizer on the four data qubits, which is the fundamental operation of the surface code. Electron shuttling is simulated in the single-valley case using a simple gate electrode geometry without explicit barrier gates, and demonstrates that adiabatic transport is possible on timescales that do not present a speed bottleneck to the processor. An important shuttling error in a clean system is uncontrolled phase rotation of the spin due to modulation of the electronic g -factor during transport, owing to the Stark effect. This error can be reduced by appropriate electrostatic tuning of the stationary electron’s g -factor. While these simulations are unrealistic in neglecting spin–orbit, valley and decoherence effects, they are realistic with respect to the gate-induced potential landscape and are a first step towards more realistic modelling. Using reasonable noise models, we estimate error thresholds with respect to single and two-qubit gate fidelities as well as singlet dephasing errors during shuttling. A twirling protocol transforms the non-Pauli noise associated with exchange gate operations into Pauli noise, making it possible to use the Gottesman–Knill theorem to efficiently simulate large codes.
Abstract A design for a large-scale surface code quantum processor based on a node/network approach is introduced for semiconductor quantum dot spin qubits. The minimal node contains only seven quantum dots, and nodes are separated on the micron scale, creating useful space for wiring interconnects and integration of conventional transistor circuits. Entanglement is distributed between neighbouring nodes by loading spin singlets locally and then shuttling one member of the pair through a linear array of empty dots. A node contains one data qubit, two ancilla qubits, and additional dots to facilitate electron shuttling and measurement of the ancillas. A four-node GHZ state is realized by sharing three internode singlets followed by local gate operations and ancilla measurements. Further local operations produce an X or Z stabilizer on the four data qubits, which is the fundamental operation of the surface code. Electron shuttling is simulated in the single-valley case using a simple gate electrode geometry without explicit barrier gates, and demonstrates that adiabatic transport is possible on timescales that do not present a speed bottleneck to the processor. An important shuttling error in a clean system is uncontrolled phase rotation of the spin due to modulation of the electronic g -factor during transport, owing to the Stark effect. This error can be reduced by appropriate electrostatic tuning of the stationary electron’s g -factor. While these simulations are unrealistic in neglecting spin–orbit, valley and decoherence effects, they are realistic with respect to the gate-induced potential landscape and are a first step towards more realistic modelling. Using reasonable noise models, we estimate error thresholds with respect to single and two-qubit gate fidelities as well as singlet dephasing errors during shuttling. A twirling protocol transforms the non-Pauli noise associated with exchange gate operations into Pauli noise, making it possible to use the Gottesman–Knill theorem to efficiently simulate large codes.
Single spin quantum dot qubits in silicon are a promising candidate for a scalable quantum processor due to their long coherence times, compact size, and ease of integration into existing fabrication technologies. Realizing a large quantum processor composed of thousands or more logical qubits requires the integration of conventional transistor circuitry \nand wiring interconnects to control each individual dot in the processor. The high density of control wiring required for these processors presents many engineering challenges. In this thesis, we propose a surface code quantum processor for silicon quantum dot qubits based on a node/network architecture. Local nodes consisting of just seven quantum dots are \nspatially separated on the order of microns to facilitate space for the necessary high density wiring. Entanglement is distributed between individual nodes via shuttling of entangled electron pairs throughout the network. X or Z stabilizer operations, necessary for operating the surface code, are realized by distributing three electron spin singlet pairs across four local nodes followed by local gate operations and ancilla measurements. Simulations of electron shuttling indicate that adiabatic transport is possible on timescales that do not bottleneck the processor speed. Phase rotation of the shuttled spin, induced by the Stark shift, can lower the overall shuttling fi delity; however, the error can be mitigated by proper electrostatic tuning of the stationary electron's g-factor. Using realistic noise models, we estimate error thresholds with respect to single and two-qubit gate fidelities as well as \nsinglet dephasing errors during shuttling. Electron shuttling is a key resource of the proposed network architecture. We continue the shuttling simulations by presenting an algorithm for finding constant-adiabatic shuttling control pulses, which enables a more rigorous study of how different conditions impact the shuttling speed and fidelity. These constant adiabatic pulses are used to optimize the physical device geometry to maximize charge shuttling speeds up to 300 nm/ns in the single-valley case. We then switch to an effective Hamiltonian representation where spin and valley degrees of freedom are accounted for during shuttling. Using realistic device and material parameters, shuttle speeds in the range 10-100 nm/ns with high spin entanglement \n fidelities are obtained when the tunneling energy exceeds the Zeeman energy. High fidelity shuttling also requires the inter-dot valley phase difference to be below a threshold determined by the ratio of tunneling and Zeeman energies, so that spin-valley-orbit mixing is weak. In this regime, we find that the primary source of infi delity is a coherent spin rotation that is correctable, in principle, using single spin rotations. Two-qubit gates in the network architecture are mediated by the exchange interaction, \nan interaction that stems from the Coulomb interaction but manifests as a rotation between the |0,1> and |1,0> two qubit states. Realizing fault tolerant two-qubit gates has proven difficult in silicon quantum dots due to charge noise which perturbs the electron orbitals states, causing decoherence. Quantitatively accurate modelling of exchange in general quantum dot networks is important towards realizing fault tolerant gates. Traditional modelling methods, such as a full con figuration interaction approach, are cumbersome due to significant computational overhead required when accounting for the electron-electron interactions in the calculation. We present a modi ed linear combination of harmonic orbitals con figuration interaction (LCHO-CI) approach which signifi cantly reduces the computational time for obtaining quantitatively accurate estimations of exchange. The method works by approximating the single electron orbitals of the quantum dot network using an orthogonal basis of harmonic orbitals. This choice of orthogonal basis allows a precalculated library of matrix elements to be used in evaluating the Coulomb interactions, which speeds up the LCHO-CI calculation. The modi ed LCHO-CI approach is then used to study how the physical device geometry impacts the charge noise sensitivity of a double quantum dot system. We fi nd that, in general, geometries which increase the dot charging energy and decrease the gate lever arms improve the system's sensitivity to charge noise. We conclude this thesis by pivoting away from theoretical studies of silicon quantum dots and towards experimental studies of electron transport in dopant-free GaAs heterostructures. In modulation doped GaAs heterostructures, a doping layer is used to induce a two-dimensional electron gas (2DEG) at the heterojunction. Dopant-free GaAs lack the doping layer which makes fabrication more difficult as local electron reservoirs must be used to bring carriers and induce a 2DEG. The lack of the doping layer offers several advantages over modulation doped heterostructures, such as gate-ability of the 2DEG and ability to make ambipolar devices (both n- and p-type ohmic contacts). Realizing n- and p-type ohmic contacts requires etching a recess pit and depositing the ohmic material at an angle in order to preventing screening of the top gate when inducing a 2DEG or two-dimensional hole gas (2DHG). Magnetotransport experiments are used to characterize an induced 2DEG and 2DHG in a Hall bar fabricated on a 310 nm deep single heterojunction. The carrier mobility and density can be tuned using the top gate, and we achieve peak mobility values of 4.5E6 cm2/Vs and 0.65E6 cm2/Vs for the 2DEG and 2DHG respectively. We then move to a one-dimensional system and study electron transport through a quantum point contact. Conductance quantization is observed, and subband spectroscopy \nmeasurements indicate a 1D subband spacing of 4.5 meV. Finally, we study dynamically driven electron transport in a zero-dimensional system using a tunable-barrier quantum dot acting as a single electron pump. Single electron pumping is observed up to T = 5 K, and fi ts to the electron cascade model suggests pumping errors of 1.87 ppm when operated at a driving frequency of f = 500 MHz.
Spin qubits in silicon quantum dots are one of the most promising building blocks for large scale quantum computers thanks to their high qubit density and compatibility with the existing semiconductor technologies. High fidelity single-qubit gates exceeding the threshold of error correction codes like the surface code have been demonstrated, while two-qubit gates have reached 98% fidelity and are improving rapidly. However, there are other types of error --- such as charge leakage and propagation --- that may occur in quantum dot arrays and which cannot be corrected by quantum error correction codes, making them potentially damaging even when their probability is small. We propose a surface code architecture for silicon quantum dot spin qubits that is robust against leakage errors by incorporating multi-electron mediator dots. Charge leakage in the qubit dots is transferred to the mediator dots via charge relaxation processes and then removed using charge reservoirs attached to the mediators. A stabiliser-check cycle, optimised for our hardware, then removes the correlations between the residual physical errors. Through simulations we obtain the surface code threshold for the charge leakage errors and show that in our architecture the damage due to charge leakage errors is reduced to a similar level to that of the usual depolarising gate noise. Spin leakage errors in our architecture are constrained to only ancilla qubits and can be removed during quantum error correction via reinitialisations of ancillae, which ensure the robustness of our architecture against spin leakage as well. Our use of an elongated mediator dots creates spaces throughout the quantum dot array for charge reservoirs, measuring devices and control gates, providing the scalability in the design.
Quantum physics describes the universe on a microscopic scale. Even though this scale is not accessible without complex experimental setups, quantum effects are respon- sible for the properties of matter and in some instances we have learned to exploit them technologically. A modern computer constituted of transistors passively utilizes the quantum nature of charge carriers in the band structure of semiconductors to encode and process information. Although such a classical computer is a formidable tool already, what could be achieved with active control over the quantum states in the computer is an intriguing question. This is the idea of the quantum computer, which offers an entirely new paradigm of computing by encoding information in quantum binary digits (qubits). Indeed, for several applications it has been shown that a quantum computer is superior to its classical counterpart, even though its realization remains elusive up to date. One candidate to host qubits are gate-defined semiconductor quantum dots, confin- ing single or few charge carriers with spin. The spin of a single confined electron is a quantum two-level system which can be manipulated and measured, allowing the storage and processing of quantum information. This thesis can be viewed as part of the endeavor to give birth to quantum computers based on semiconductor spin qubits. It primarily focuses on the challenge to enable scalable architectures of well-characterized qubits. In the first part, spin shuttling is investigated. This denotes the coherent transport of a single spin between spatially separate nodes of a quantum processor, driven by a time-dependent electric potential. The object of study is a minimal version of a bucket- brigade-like spin shuttling between two quantum dots. The probability of maintaining the spin state is identified as figure of merit and the effect of spin-orbit interaction and the Zeeman effect in an inhomogeneous magnetic field is explored with analytical and numerical methods. Special attention is paid to the repercussions of near-degenerate valleys. The second part of the thesis addresses the challenge to probe the microscopic properties of a quantum dot array, which is a crucial first step before any quantum operation can be performed. The transmission of a microwave resonator coupled to a triple quantum dot occupied by two electrons is investigated, and a scheme to infer the exchange interaction between electrons in adjacent quantum dots is proposed. By means of analytical derivations it is shown that the transmission profile of the resonator directly reveals the value of the exchange coupling strength between two electrons. This holds even if magnetic gradients or a valley splitting comparable to the inter-dot tunnel coupling are included. Subsequently, quantum transport measurements in the Pauli blockade regime are modelled in the presence of a microwave resonator, bringing together two powerful techniques to probe quantum dots. Based on generalized input-output theory, a theoretical framework is derived to investigate how a double quantum dot in a transport setup interacts with a coupled microwave resonator while the current through the double qauntum dot is rectified by Pauli blockade. It is shown that the output field of the resonator can be used to infer the leakage current and thus obtain insight into the blockade mechanisms and to estimate a large number of parameters of the quantum dots. Furthermore, the back-action of the resonator photons on the steady state leakage current is described and quantified. In the context of Pauli blockade, the spin and valley physics of bilayer graphene quantum dots in the few-electron regime is touched upon, describing a situation where spin blockade is observed despite the presence of the valleys. In the final part of the thesis, the attention is shifted towards the readout of the spin qubits. A new paradigm of dispersive readout is devised, which is performed while the qubit dephases, implementing a measurement in the x-basis. Laplace transforming the time dependent cavity response allows a separation of contributions from multiple qubits coupled to the same resonator. Thus, they can be read out simultaneously in a single shot. Modelling silicon spin qubits, as an example, results in in a readout time that compares favourably to conventional dispersive readout with comparable fidelity, even for a single qubit. With an auxiliary qubit the readout scheme can be extended to a quantum non-demolition measurement.
Quantum computers require a coordinated operation on a large number of quantum bits (qubits), presenting considerable obstacles such as system integration on a large scale, individual qubits control with precision, and significant error correction overhead. Silicon (Si) quantum dot (QD) spin qubits paired with CMOS control circuits promise a scalable solution due to its potential for large-scale integration utilizing well-established semiconductor technologies. This paper proposes a control addressing scheme for QD spin qubits operating on a node network architecture. Compared to the typical 2-dimensional array architecture, this approach considerably lowers the area constraint for control signal routing. Scalable circuits are designed to route the control signals for local and global operations of a surface code quantum error correction through the modular design of tiered switches controlled by demultiplexers. The proposed method is a critical step toward implementing scalable solid-state quantum processors.
A scaled quantum computer with donor spins in silicon would benefit from a viable semiconductor framework and a strong inherent decoupling of the qubits from the noisy environment. Coupling neighboring spins via the natural exchange interaction according to current designs requires gate control structures with extremely small length scales. We present a silicon architecture where bismuth donors with long coherence times are coupled to electrons that can shuttle between adjacent quantum dots, thus relaxing the pitch requirements and allowing space between donors for classical control devices. An adiabatic SWAP operation within each donor/dot pair solves the scalability issues intrinsic to exchange-based two-qubit gates, as it does not rely on subnanometer precision in donor placement and is robust against noise in the control fields. We use this SWAP together with well established global microwave Rabi pulses and parallel electron shuttling to construct a surface code that needs minimal, feasible local control.
The exceptionally long quantum coherence times of phosphorus donor nuclear spin qubits in silicon, coupled with the proven scalability of silicon-based nano-electronics, make them attractive candidates for large-scale quantum computing. However, the high threshold of topological quantum error correction can only be captured in a two-dimensional array of qubits operating synchronously and in parallel-posing formidable fabrication and control challenges. We present an architecture that addresses these problems through a novel shared-control paradigm that is particularly suited to the natural uniformity of the phosphorus donor nuclear spin qubit states and electronic confinement. The architecture comprises a two-dimensional lattice of donor qubits sandwiched between two vertically separated control layers forming a mutually perpendicular crisscross gate array. Shared-control lines facilitate loading/unloading of single electrons to specific donors, thereby activating multiple qubits in parallel across the array on which the required operations for surface code quantum error correction are carried out by global spin control. The complexities of independent qubit control, wave function engineering, and ad hoc quantum interconnects are explicitly avoided. With many of the basic elements of fabrication and control based on demonstrated techniques and with simulated quantum operation below the surface code error threshold, the architecture represents a new pathway for large-scale quantum information processing in silicon and potentially in other qubit systems where uniformity can be exploited.