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arXiv:1509.01854 · Applied Physics Letters

Surface participation and dielectric loss in superconducting qubits

Chen Wang, Christopher J. Axline, Yvonne Y. Gao, T. Brecht, Yiwen Chu, Luigi Frunzio, Michel Devoret, Robert J. Schoelkopf

Published Oct 19, 2015• 340 citations
arXivHTMLPDF

Abstract

We study the energy relaxation times (T1) of superconducting transmon qubits in 3D cavities as a function of dielectric participation ratios of material surfaces. This surface participation ratio, representing the fraction of electric field energy stored in a dissipative surface layer, is computed by a two-step finite-element simulation and experimentally varied by qubit geometry. With a clean electromagnetic environment and suppressed non-equilibrium quasiparticle density, we find an approximately proportional relation between the transmon relaxation rates and surface participation ratios. These results suggest dielectric dissipation arising from material interfaces is the major limiting factor for the T1 of transmons in 3D circuit quantum electrodynamics architecture. Our analysis also supports the notion of spatial discreteness of surface dielectric dissipation.

DOI
10.1063/1.4934486

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We study the energy relaxation times (T1) of superconducting transmon qubits in 3D cavities as a function of dielectric participation ratios of material surfaces. This surface participation ratio, representing the fraction of electric field energy stored in a dissipative surface layer, is computed by a two-step finite-element simulation and experimentally varied by qubit geometry. With a clean electromagnetic environment and suppressed non-equilibrium quasiparticle density, we find an approximately proportional relation between the transmon relaxation rates and surface participation ratios. These results suggest dielectric dissipation arising from material interfaces is the major limiting factor for the T1 of transmons in 3D circuit quantum electrodynamics architecture. Our analysis also supports the notion of spatial discreteness of surface dielectric dissipation.
Abstract Surface dielectric loss from superconducting transmon qubits is believed to be one of the dominant sources of decoherence. Reducing surface dielectric loss is crucial for achieving a high quality factor and a long relaxation time (T 1), which can be engineered by carefully changing the geometry of a transmon. In this paper, we present a shape-optimization approach to reduce surface dielectric loss in a transmon qubit. The capacitor pads and junction wires of transmons are shaped as spline curves and optimized through the finite-element method and a global optimization algorithm. We find that the participation ratio of capacitor pads and junction wires can be reduced by 15 % − 18 % and 22 % − 26 % compared to previous designs, while the overall footprint and anharmonicity are maintained at acceptable values. As a result, the two-level system-limited quality factor and the corresponding T 1 were increased by 21.6%.
Quantum processors using superconducting qubits suffer from dielectric loss leading to noise and dissipation. Qubits are usually designed as large capacitor pads connected to a non-linear Josephson junction (or SQUID) by a superconducting thin metal wiring. Here, we report on finite-element simulation and experimental results confirming that more than 50% of surface loss in transmon qubits can originate from Josephson junctions wiring and can limit qubit relaxation time. We experimentally extracted dielectric loss tangents of qubit elements and showed that dominant surface loss of wiring can occur for real qubits designs. Finally, we experimentally demonstrate up to 20% improvement in qubit quality factor by wiring design optimization.
Superconducting qubits are sensitive to a variety of loss mechanisms, which include dielectric loss from interfaces. The calculation of participation near the key interfaces of planar designs can be accomplished through an analytical description of the electric field density based on conformal mapping. In this way, a 2-D approximation to coplanar waveguide and capacitor designs produces values of the participation as a function of depth from the top metallization layer as well as the volume participation within a given thickness from this surface by reducing the problem to a surface integration over the region of interest. These quantities are compared to finite-element method numerical solutions, which validate the values at large distances from the coplanar metallization but diverge near the edges of the metallization features due to the singular nature of the electric fields. A simple approximation to the electric field energy at shallow depths (relative to the waveguide width) is also presented that closely replicates the numerical results based on conformal mapping and those reported in prior literature. These techniques are applied to the calculation of surface participation within a transmon qubit design, where the effects due to shunting capacitors can be easily integrated with those associated with metallization comprising the local environment of the qubit junction.
Dielectric loss due to two-level systems is a limiting factor for superconducting qubit relaxation times. These losses arise mostly from nanometer-scale interfacial defect regions in superconducting devices with planar dimensions of microns to millimeters, thus making it resource intensive to accurately simulate the electric field density in these regions with traditional electromagnetic solvers. In this work, we demonstrate a fast boundary integral equation solver that allows precise simulation of electric field density in these thin regions, showing a speedup of around two orders of magnitude over traditional solvers, with relative errors around 10−710^{-7}10−7 for a ten-minute solution runtime. By computing participation ratios through Green's first identity without squaring the electric field, our approach is less susceptible to the field singularities near conductor corners. We apply this solver to a basic untrenched coplanar waveguide cross-section, showing that the common assumption of participation ratio linearity with dielectric constant holds well for some interfaces and not others; in particular, while the metal-air (MA) top and corner follow this linear relationship strongly, the MA sidewall does not. We then compare isotropic and anisotropic etching, showing that the MA sidewall and the metal-air-substrate triple junction are the most strongly affected. We are currently leveraging this solver to explore geometries that will uniquely isolate the participation ratios of the different dielectrics. Finally, we are working to combine this solver framework with a full 3D microwave solver to accurately calculate participation ratios for the thin dielectrics that are known sources of loss in superconducting qubits.
An accurate and efficient numerical electromagnetic model for superconducting qubits is essential for characterizing and minimizing design-dependent dielectric losses. The energy participation ratio (EPR) is the commonly adopted metric used to evaluate these losses, but its calculation presents a severe multiscale computational challenge. Conventional finite element method (FEM) requires 3D volumetric meshing, leading to prohibitive computational costs and memory requirements when attempting to capture singular electric fields at nanometer-thin material interfaces. To address this bottleneck, we propose SesQ, a surface integral equation simulator tailored for the precise simulation of the EPR. By applying discretization on 2D surfaces, deriving a semi-analytical multilayer Green's function, and employing a dedicated non-conformal boundary mesh refinement scheme, SesQ accurately resolves singular edge fields without an explosive growth in the number of unknowns. Validations with analytically solvable models demonstrate that SesQ accelerates capacitance extraction by roughly two orders of magnitude compared to commercial FEM tools. While achieving comparable accuracy for capacitance extraction, SesQ delivers superior precision for EPR calculation. Simulations of practical transmon qubits further reveal that FEM approaches tend to significantly underestimate the EPR. Finally, the high efficiency of SesQ enables rapid iteration in the layout optimization, as demonstrated by minimizing the EPR of the qubit pattern, establishing the simulator as a powerful tool for the automated design of low-loss superconducting quantum circuits.
The Josephson junction and shunt capacitor form a transmon qubit, which is the cornerstone of modern quantum computing platforms. For reliable quantum computing, it is important how long a qubit can remain in a superposition of quantum states, which is determined by the coherence time (T1). The coherence time of a qubit effectively sets the "lifetime" of usable quantum information, determining how long quantum computations can be performed before errors occur and information is lost. There are several sources of decoherence in transmon qubits, but the predominant one is generally considered to be dielectric losses in the natural oxide layer formed on the surface of the superconductor. In this paper, we present a numerical study of microwave surface losses in planar superconducting antennas of different transmon qubit designs. An asymptotic method for estimating the energy participation ratio in ultrathin films of nanometer scales is proposed, and estimates are given for the limits of achievable minimum RF losses depending on the electrical properties of the surface oxide and the interface of the qubit with the substrate material.