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arXiv:2607.26242

Precise 2D electric field density simulations for superconducting quantum devices

Zydrunas Gimbutas, Wei-Ren Syong, Nhi Nguyen, Ariana Taylor, Joel N. Ullom, Bradley K. Alpert, Douglas A. Bennett, Corey Rae H. McRae

quant-phSubmitted Jul 28, 2026• Announced Jul 30, 2026• 0 citations
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Abstract

Dielectric loss due to two-level systems is a limiting factor for superconducting qubit relaxation times. These losses arise mostly from nanometer-scale interfacial defect regions in superconducting devices with planar dimensions of microns to millimeters, thus making it resource intensive to accurately simulate the electric field density in these regions with traditional electromagnetic solvers. In this work, we demonstrate a fast boundary integral equation solver that allows precise simulation of electric field density in these thin regions, showing a speedup of around two orders of magnitude over traditional solvers, with relative errors around $10^{-7}$ for a ten-minute solution runtime. By computing participation ratios through Green's first identity without squaring the electric field, our approach is less susceptible to the field singularities near conductor corners. We apply this solver to a basic untrenched coplanar waveguide cross-section, showing that the common assumption of participation ratio linearity with dielectric constant holds well for some interfaces and not others; in particular, while the metal-air (MA) top and corner follow this linear relationship strongly, the MA sidewall does not. We then compare isotropic and anisotropic etching, showing that the MA sidewall and the metal-air-substrate triple junction are the most strongly affected. We are currently leveraging this solver to explore geometries that will uniquely isolate the participation ratios of the different dielectrics. Finally, we are working to combine this solver framework with a full 3D microwave solver to accurately calculate participation ratios for the thin dielectrics that are known sources of loss in superconducting qubits.

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An accurate and efficient numerical electromagnetic model for superconducting qubits is essential for characterizing and minimizing design-dependent dielectric losses. The energy participation ratio (EPR) is the commonly adopted metric used to evaluate these losses, but its calculation presents a severe multiscale computational challenge. Conventional finite element method (FEM) requires 3D volumetric meshing, leading to prohibitive computational costs and memory requirements when attempting to capture singular electric fields at nanometer-thin material interfaces. To address this bottleneck, we propose SesQ, a surface integral equation simulator tailored for the precise simulation of the EPR. By applying discretization on 2D surfaces, deriving a semi-analytical multilayer Green's function, and employing a dedicated non-conformal boundary mesh refinement scheme, SesQ accurately resolves singular edge fields without an explosive growth in the number of unknowns. Validations with analytically solvable models demonstrate that SesQ accelerates capacitance extraction by roughly two orders of magnitude compared to commercial FEM tools. While achieving comparable accuracy for capacitance extraction, SesQ delivers superior precision for EPR calculation. Simulations of practical transmon qubits further reveal that FEM approaches tend to significantly underestimate the EPR. Finally, the high efficiency of SesQ enables rapid iteration in the layout optimization, as demonstrated by minimizing the EPR of the qubit pattern, establishing the simulator as a powerful tool for the automated design of low-loss superconducting quantum circuits.

quant-pharXiv:2603.28524•Mar 31, 2026•0 citations

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Effects of device geometry and material properties on dielectric losses in superconducting coplanar-waveguide resonators

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Superconducting coplanar-waveguide (CPW) resonators are one of the key devices in circuit quantum electrodynamics (cQED). Their performance can be limited by dielectric losses in the substrate and in the material interfaces. Reliable modeling is required to aid in the design of low-loss CPW structures for cQED. We analyze the geometric dependence of the dielectric losses in CPW structures using finite-element modeling of the participation ratios of the lossy regions. In a practical scenario, uncertainties in the the dielectric constants and loss tangents of these regions introduce uncertainties in the theoretically predicted participation ratios. We present a method for combining loss simulations with measurements of two-level-system-limited quality factors and resonance frequencies of CPW resonators. Namely, we solve an inverse problem to find model parameters producing the measured values. High quality factors are obtainable by properly designing the cross-sectional geometries of the CPW structures, but more accurate modeling and design methods for low-loss CPW resonators are called for major future improvements. Our nonlinear optimization methodology for solving the aforementioned inverse problem is a step in this direction.

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Savola, Niko

Quantum computers are devices that use quantum phenomena for information processing, with the advantage of solving specific problems faster than classical computers. Superconducting circuits with Josephson junctions have emerged as one of the most promising platforms for large-scale quantum computing in the last decade. However, in the current noisy intermediate-scale quantum era, circuits and algorithms suffer from low fidelities and limited amount of superconducting quantum bits, or qubits. Short coherence times owing to undesired transitions between the excited and ground states of a qubit, are one of the primary sources of error. This work studies the contribution of losses arising from two-level systems, localized predominantly in material interfaces, on the coherence time for conventional superconducting-qubit geometries. This is accomplished by using the method of energy participation ratios with electromagnetic finite-element-method simulations. First, we compare energy participations in two-dimensional cross-sections to those in a similar three-dimensional environment with a thin-sheet approximation for metal thickness and no modelling of lossy material interfaces. After validating the approximations, the method of energy participation ratios is further applied to analyze real-world qubit designs, demonstrating how the approach can facilitate the development of high-coherence superconducting quantum devices. Individual design parameter sweeps are also conducted to provide insight into dependencies on the geometry. We discover that the electric field is concentrated near the Josephson junction area, and the resulting participations are primarily influenced by the lengths of etched gaps between metals in a chip. A Bayesian machine-learning-based optimizer is introduced to systematically discover design geometries that improve qubit relaxation time. This approach is applied to a modified version of a common qubit geometry defined by splines. Furthermore, the workflow is implemented in KQCircuits, a GPLv3-licensed open-source layout design tool for designing state-of-the-art superconducting circuits and processors.

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Optimizing Interface Dielectric Loss in Superconducting Coplanar Waveguide Resonators for Improved Quantum Circuit Coherence

Omar A. Saleh, Saleem G. Rao, Mohammed Alghadeer +2 more

Superconducting quantum computing systems, including coplanar waveguide (CPW) resonators and qubits, are highly susceptible to energy dissipation from two-level systems (TLS) within bulk and interfacial dielectrics. CPW resonators serve as an ideal platform for characterizing these material losses at the single-photon excitation level. Building on recent experimental evidence that interface engineering can mitigate TLS losses, this study employs simulations to evaluate resonator quality factors across various interface modifications. Our results demonstrate that reducing losses at the substrate–air (SA) interface can increase the internal quality factor Qi by up to three orders of magnitude. While etching the SA interface also enhances Qi, material loss remains the dominant dissipation mechanism. Furthermore, we find that other lossy interfaces have a significantly smaller impact on the quality factor compared to the SA interface. These simulation results align with established experimental findings, providing a robust framework for refining resonator design. This work offers precise guidelines for TLS mitigation, essential for enhancing coherence times and developing more reliable superconducting quantum processors.

Technologies•Feb 18, 2026•0 citations
Dielectric loss due to two-level systems is a limiting factor for superconducting qubit relaxation times. These losses arise mostly from nanometer-scale interfacial defect regions in superconducting devices with planar dimensions of microns to millimeters, thus making it resource intensive to accurately simulate the electric field density in these regions with traditional electromagnetic solvers. In this work, we demonstrate a fast boundary integral equation solver that allows precise simulation of electric field density in these thin regions, showing a speedup of around two orders of magnitude over traditional solvers, with relative errors around 10−710^{-7}10−7 for a ten-minute solution runtime. By computing participation ratios through Green's first identity without squaring the electric field, our approach is less susceptible to the field singularities near conductor corners. We apply this solver to a basic untrenched coplanar waveguide cross-section, showing that the common assumption of participation ratio linearity with dielectric constant holds well for some interfaces and not others; in particular, while the metal-air (MA) top and corner follow this linear relationship strongly, the MA sidewall does not. We then compare isotropic and anisotropic etching, showing that the MA sidewall and the metal-air-substrate triple junction are the most strongly affected. We are currently leveraging this solver to explore geometries that will uniquely isolate the participation ratios of the different dielectrics. Finally, we are working to combine this solver framework with a full 3D microwave solver to accurately calculate participation ratios for the thin dielectrics that are known sources of loss in superconducting qubits.
An accurate and efficient numerical electromagnetic model for superconducting qubits is essential for characterizing and minimizing design-dependent dielectric losses. The energy participation ratio (EPR) is the commonly adopted metric used to evaluate these losses, but its calculation presents a severe multiscale computational challenge. Conventional finite element method (FEM) requires 3D volumetric meshing, leading to prohibitive computational costs and memory requirements when attempting to capture singular electric fields at nanometer-thin material interfaces. To address this bottleneck, we propose SesQ, a surface integral equation simulator tailored for the precise simulation of the EPR. By applying discretization on 2D surfaces, deriving a semi-analytical multilayer Green's function, and employing a dedicated non-conformal boundary mesh refinement scheme, SesQ accurately resolves singular edge fields without an explosive growth in the number of unknowns. Validations with analytically solvable models demonstrate that SesQ accelerates capacitance extraction by roughly two orders of magnitude compared to commercial FEM tools. While achieving comparable accuracy for capacitance extraction, SesQ delivers superior precision for EPR calculation. Simulations of practical transmon qubits further reveal that FEM approaches tend to significantly underestimate the EPR. Finally, the high efficiency of SesQ enables rapid iteration in the layout optimization, as demonstrated by minimizing the EPR of the qubit pattern, establishing the simulator as a powerful tool for the automated design of low-loss superconducting quantum circuits.
Superconducting qubits are sensitive to a variety of loss mechanisms, which include dielectric loss from interfaces. The calculation of participation near the key interfaces of planar designs can be accomplished through an analytical description of the electric field density based on conformal mapping. In this way, a 2-D approximation to coplanar waveguide and capacitor designs produces values of the participation as a function of depth from the top metallization layer as well as the volume participation within a given thickness from this surface by reducing the problem to a surface integration over the region of interest. These quantities are compared to finite-element method numerical solutions, which validate the values at large distances from the coplanar metallization but diverge near the edges of the metallization features due to the singular nature of the electric fields. A simple approximation to the electric field energy at shallow depths (relative to the waveguide width) is also presented that closely replicates the numerical results based on conformal mapping and those reported in prior literature. These techniques are applied to the calculation of surface participation within a transmon qubit design, where the effects due to shunting capacitors can be easily integrated with those associated with metallization comprising the local environment of the qubit junction.
We study the energy relaxation times (T1) of superconducting transmon qubits in 3D cavities as a function of dielectric participation ratios of material surfaces. This surface participation ratio, representing the fraction of electric field energy stored in a dissipative surface layer, is computed by a two-step finite-element simulation and experimentally varied by qubit geometry. With a clean electromagnetic environment and suppressed non-equilibrium quasiparticle density, we find an approximately proportional relation between the transmon relaxation rates and surface participation ratios. These results suggest dielectric dissipation arising from material interfaces is the major limiting factor for the T1 of transmons in 3D circuit quantum electrodynamics architecture. Our analysis also supports the notion of spatial discreteness of surface dielectric dissipation.
Superconducting coplanar-waveguide (CPW) resonators are one of the key devices in circuit quantum electrodynamics (cQED). Their performance can be limited by dielectric losses in the substrate and in the material interfaces. Reliable modeling is required to aid in the design of low-loss CPW structures for cQED. We analyze the geometric dependence of the dielectric losses in CPW structures using finite-element modeling of the participation ratios of the lossy regions. In a practical scenario, uncertainties in the the dielectric constants and loss tangents of these regions introduce uncertainties in the theoretically predicted participation ratios. We present a method for combining loss simulations with measurements of two-level-system-limited quality factors and resonance frequencies of CPW resonators. Namely, we solve an inverse problem to find model parameters producing the measured values. High quality factors are obtainable by properly designing the cross-sectional geometries of the CPW structures, but more accurate modeling and design methods for low-loss CPW resonators are called for major future improvements. Our nonlinear optimization methodology for solving the aforementioned inverse problem is a step in this direction.
Quantum computers are devices that use quantum phenomena for information processing, with the advantage of solving specific problems faster than classical computers. Superconducting circuits with Josephson junctions have emerged as one of the most promising platforms for large-scale quantum computing in the last decade. However, in the current noisy intermediate-scale quantum era, circuits and algorithms suffer from low fidelities and limited amount of superconducting quantum bits, or qubits. Short coherence times owing to undesired transitions between the excited and ground states of a qubit, are one of the primary sources of error. This work studies the contribution of losses arising from two-level systems, localized predominantly in material interfaces, on the coherence time for conventional superconducting-qubit geometries. This is accomplished by using the method of energy participation ratios with electromagnetic finite-element-method simulations. First, we compare energy participations in two-dimensional cross-sections to those in a similar three-dimensional environment with a thin-sheet approximation for metal thickness and no modelling of lossy material interfaces. After validating the approximations, the method of energy participation ratios is further applied to analyze real-world qubit designs, demonstrating how the approach can facilitate the development of high-coherence superconducting quantum devices. Individual design parameter sweeps are also conducted to provide insight into dependencies on the geometry. We discover that the electric field is concentrated near the Josephson junction area, and the resulting participations are primarily influenced by the lengths of etched gaps between metals in a chip. A Bayesian machine-learning-based optimizer is introduced to systematically discover design geometries that improve qubit relaxation time. This approach is applied to a modified version of a common qubit geometry defined by splines. Furthermore, the workflow is implemented in KQCircuits, a GPLv3-licensed open-source layout design tool for designing state-of-the-art superconducting circuits and processors.
Superconducting quantum computing systems, including coplanar waveguide (CPW) resonators and qubits, are highly susceptible to energy dissipation from two-level systems (TLS) within bulk and interfacial dielectrics. CPW resonators serve as an ideal platform for characterizing these material losses at the single-photon excitation level. Building on recent experimental evidence that interface engineering can mitigate TLS losses, this study employs simulations to evaluate resonator quality factors across various interface modifications. Our results demonstrate that reducing losses at the substrate–air (SA) interface can increase the internal quality factor Qi by up to three orders of magnitude. While etching the SA interface also enhances Qi, material loss remains the dominant dissipation mechanism. Furthermore, we find that other lossy interfaces have a significantly smaller impact on the quality factor compared to the SA interface. These simulation results align with established experimental findings, providing a robust framework for refining resonator design. This work offers precise guidelines for TLS mitigation, essential for enhancing coherence times and developing more reliable superconducting quantum processors.