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arXiv:1412.7010 · Physical Review B

Fault-tolerant quantum computation for singlet-triplet qubits with leakage errors

Sebastian Mehl, Hendrik Bluhm, David Peter Divincenzo

Published Feb 20, 2015• 21 citations
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Abstract

We describe and analyze leakage errors of singlet-triplet qubits. Even though leakage errors are a natural problem for spin qubits encoded using quantum dot arrays, they have obtained little attention in previous studies. We describe the realization of leakage correction protocols that can be implemented together with the quantum error correction protocol of the surface code. Furthermore we construct explicit leakage reduction units that need, in the ideal setup, as few as three manipulation steps. Our study shows that leakage errors can be corrected without the need of measurements and at the cost of only a few additional ancilla qubits and gate operations compared to standard quantum error correction codes.

DOI
10.1103/physrevb.91.085419

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We describe and analyze leakage errors of singlet-triplet qubits. Even though leakage errors are a natural problem for spin qubits encoded using quantum dot arrays, they have obtained little attention in previous studies. We describe the realization of leakage correction protocols that can be implemented together with the quantum error correction protocol of the surface code. Furthermore we construct explicit leakage reduction units that need, in the ideal setup, as few as three manipulation steps. Our study shows that leakage errors can be corrected without the need of measurements and at the cost of only a few additional ancilla qubits and gate operations compared to standard quantum error correction codes.
Fast and high fidelity shuttling of spin qubits has been demonstrated in semiconductor quantum dot devices. Several architectures based on shuttling have been proposed; it has been suggested that singlet-triplet (dual-spin) qubits could be optimal for the highest shuttling fidelities. Here we present a fault-tolerant framework for quantum error correction based on such dual-spin qubits, establishing them as a natural realisation of erasure qubits within semiconductor architectures. We introduce a hardware-efficient leakage-detection protocol that automatically projects leaked qubits back onto the computational subspace, without the need for measurement feedback or increased classical control overheads. When combined with the XZZX surface code and leakage-aware decoding, we demonstrate a twofold increase in the error correction threshold and achieve orders-of-magnitude reductions in logical error rates. This establishes the singlet-triplet encoding as a practical route toward high-fidelity shuttling and erasure-based, fault-tolerant quantum computation in semiconductor devices.
Spin qubits in silicon quantum dots are one of the most promising building blocks for large scale quantum computers thanks to their high qubit density and compatibility with the existing semiconductor technologies. High fidelity single-qubit gates exceeding the threshold of error correction codes like the surface code have been demonstrated, while two-qubit gates have reached 98% fidelity and are improving rapidly. However, there are other types of error --- such as charge leakage and propagation --- that may occur in quantum dot arrays and which cannot be corrected by quantum error correction codes, making them potentially damaging even when their probability is small. We propose a surface code architecture for silicon quantum dot spin qubits that is robust against leakage errors by incorporating multi-electron mediator dots. Charge leakage in the qubit dots is transferred to the mediator dots via charge relaxation processes and then removed using charge reservoirs attached to the mediators. A stabiliser-check cycle, optimised for our hardware, then removes the correlations between the residual physical errors. Through simulations we obtain the surface code threshold for the charge leakage errors and show that in our architecture the damage due to charge leakage errors is reduced to a similar level to that of the usual depolarising gate noise. Spin leakage errors in our architecture are constrained to only ancilla qubits and can be removed during quantum error correction via reinitialisations of ancillae, which ensure the robustness of our architecture against spin leakage as well. Our use of an elongated mediator dots creates spaces throughout the quantum dot array for charge reservoirs, measuring devices and control gates, providing the scalability in the design.
Superconducting qubits, while promising for scalability and long coherence times, contain more than two energy levels, and therefore are susceptible to errors generated by the leakage of population outside of the computational subspace. Such leakage errors constitute a prominent roadblock towards fault-tolerant quantum computing (FTQC) with superconducting qubits. FTQC using topological codes is based on sequential measurements of multiqubit stabilizer operators. Here, we first propose a leakage-resilient procedure to perform repetitive measurements of multiqubit stabilizer operators, and then use this scheme as an ingredient to develop a leakage-resilient approach for surface code quantum error correction with superconducting circuits. Our protocol is based on swap operations between data and ancilla qubits at the end of every cycle, requiring read-out and reset operations on every physical qubit in the system, and thereby preventing persistent leakage errors from occurring.
We investigate the performance of two quantum error-correcting codes, the surface code and the Bacon-Shor code, for implementation with spin qubits in silicon. In each case, we construct a logical qubit using a planar array of quantum dots, exploring two encoding schemes: one based solely on single-electron Zeeman qubits (Loss-DiVincenzo qubits), and a hybrid approach combining Zeeman and singlet-triplet qubits. For both codes, we evaluate key performance metrics, including logical state preparation fidelity and cycle-level error correction performance, using state-of-the-art experimental parameters. Our results show that the hybrid encoding consistently outperforms the pure Zeeman-qubit implementation. By identifying the dominant error mechanisms that limit quantum error correction performance, our study highlights concrete targets for improving spin qubit hardware and provides a path toward scalable fault-tolerant architectures. In particular, we find that the logical error rate is not limited by memory errors, but rather by gate errors, especially 1- and 2-qubit gate errors.
Leakage is a particularly damaging error that occurs when a qubit leaves the defined computational subspace. Leakage errors limit the effectiveness of quantum error correcting codes by spreading additional errors to other qubits and corrupting syndrome measurements. The effects of leakage errors on the surface code has been studied in various contexts. However, the effects of a leaked data qubit versus a leaked ancilla qubit can be quite different. Here, we study the effects of data leakage and ancilla leakage separately. We find that data leakage is much less damaging. We show that the surface code maintains its distance in the presence of leakage by either confining leakage to data qubits or eliminating ancilla qubit leakage at the critical fault location. To demonstrate this, we introduce new techniques for handling leakage: taking advantage of gates with one-sided leakage, effectively isolating leakage events to data qubits alone and mixing two types of leakage reducing circuits, to handle data leakage and ancilla leakage separately.
Quantum error correction (QEC) codes can tolerate hardware errors by encoding fault-tolerant logical qubits using redundant physical qubits and detecting errors using parity checks. Leakage errors occur in quantum systems when a qubit leaves its computational basis and enters higher energy states. These errors severely limit the performance of QEC due to two reasons. First, they lead to erroneous parity checks that obfuscate the accurate detection of errors. Second, the leakage spreads to other qubits and creates a pathway for more errors over time. Prior works tolerate leakage errors by using leakage reduction circuits (LRCs) that modify the parity check circuitry of QEC codes. Unfortunately, naively using LRCs always throughout a program is sub-optimal because LRCs incur additional two-qubit operations that (1) facilitate leakage transport, and (2) serve as new sources of errors.