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arXiv:2506.17190 · Physical Review A

Comparison of spin-qubit architectures for quantum error-correcting codes

Mauricio Gutiérrez, Juan S. Rojas-Arias, David Obando, C. Y. Chang

Published May 28, 2026• 0 citations
arXivHTMLPDF

Abstract

We investigate the performance of two quantum error-correcting codes, the surface code and the Bacon-Shor code, for implementation with spin qubits in silicon. In each case, we construct a logical qubit using a planar array of quantum dots, exploring two encoding schemes: one based solely on single-electron Zeeman qubits (Loss-DiVincenzo qubits), and a hybrid approach combining Zeeman and singlet-triplet qubits. For both codes, we evaluate key performance metrics, including logical state preparation fidelity and cycle-level error correction performance, using state-of-the-art experimental parameters. Our results show that the hybrid encoding consistently outperforms the pure Zeeman-qubit implementation. By identifying the dominant error mechanisms that limit quantum error correction performance, our study highlights concrete targets for improving spin qubit hardware and provides a path toward scalable fault-tolerant architectures. In particular, we find that the logical error rate is not limited by memory errors, but rather by gate errors, especially 1- and 2-qubit gate errors.

DOI
10.1103/qlw3-xk2f

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We investigate the performance of two quantum error-correcting codes, the surface code and the Bacon-Shor code, for implementation with spin qubits in silicon. In each case, we construct a logical qubit using a planar array of quantum dots, exploring two encoding schemes: one based solely on single-electron Zeeman qubits (Loss-DiVincenzo qubits), and a hybrid approach combining Zeeman and singlet-triplet qubits. For both codes, we evaluate key performance metrics, including logical state preparation fidelity and cycle-level error correction performance, using state-of-the-art experimental parameters. Our results show that the hybrid encoding consistently outperforms the pure Zeeman-qubit implementation. By identifying the dominant error mechanisms that limit quantum error correction performance, our study highlights concrete targets for improving spin qubit hardware and provides a path toward scalable fault-tolerant architectures. In particular, we find that the logical error rate is not limited by memory errors, but rather by gate errors, especially 1- and 2-qubit gate errors.
Spin qubits in silicon quantum dots are one of the most promising building blocks for large scale quantum computers thanks to their high qubit density and compatibility with the existing semiconductor technologies. High fidelity single-qubit gates exceeding the threshold of error correction codes like the surface code have been demonstrated, while two-qubit gates have reached 98% fidelity and are improving rapidly. However, there are other types of error --- such as charge leakage and propagation --- that may occur in quantum dot arrays and which cannot be corrected by quantum error correction codes, making them potentially damaging even when their probability is small. We propose a surface code architecture for silicon quantum dot spin qubits that is robust against leakage errors by incorporating multi-electron mediator dots. Charge leakage in the qubit dots is transferred to the mediator dots via charge relaxation processes and then removed using charge reservoirs attached to the mediators. A stabiliser-check cycle, optimised for our hardware, then removes the correlations between the residual physical errors. Through simulations we obtain the surface code threshold for the charge leakage errors and show that in our architecture the damage due to charge leakage errors is reduced to a similar level to that of the usual depolarising gate noise. Spin leakage errors in our architecture are constrained to only ancilla qubits and can be removed during quantum error correction via reinitialisations of ancillae, which ensure the robustness of our architecture against spin leakage as well. Our use of an elongated mediator dots creates spaces throughout the quantum dot array for charge reservoirs, measuring devices and control gates, providing the scalability in the design.
Quantum error correction (QEC) is indispensable for scalable quantum computing, but implementing it with minimal hardware overhead remains a central challenge. Large spin systems with collective degrees of freedom offer a promising route to reducing the control complexity of qubit architectures while retaining a large Hilbert space for fault-tolerant encoding. However, existing proposals for logical gates and QEC in spin ensembles generally rely on inefficient higher-order interactions. Here we introduce spin-N-Cat codes, which encode logical qubits in superpositions of spin-coherent states and generalize bosonic Cat codes to the modular subspaces of permutationally symmetric spin ensembles. The code corrects collective and individual dephasing, excitation, and decay errors. We also present an efficient physical realization in central-spin systems, such as a quantum dot, where encoding, decoding, and a universal, fault-tolerant, and bias-preserving gate set are implemented using only first-order interactions. Numerical simulations demonstrate high logical fidelity under dephasing and excitation-decay noise, independent of noise bias, and that full QEC cycles are feasible with realistic microscopic parameters. For the large collective spins available in quantum dots, this translates into a substantial extension of coherence time. Our results establish spin-N-Cat codes as a scalable, hardware-efficient approach to QEC in spin-based quantum architectures.
Quantum error correction protects fragile quantum information by encoding it into a larger quantum system. These extra degrees of freedom enable the detection and correction of errors, but also increase the operational complexity of the encoded logical qubit. Fault-tolerant circuits contain the spread of errors while operating the logical qubit, and are essential for realizing error suppression in practice. While fault-tolerant design works in principle, it has not previously been demonstrated in an error-corrected physical system with native noise characteristics. In this work, we experimentally demonstrate fault-tolerant preparation, measurement, rotation, and stabilizer measurement of a Bacon-Shor logical qubit using 13 trapped ion qubits. When we compare these fault-tolerant protocols to non-fault tolerant protocols, we see significant reductions in the error rates of the logical primitives in the presence of noise. The result of fault-tolerant design is an average state preparation and measurement error of 0.6% and a Clifford gate error of 0.3% after error correction. Additionally, we prepare magic states with fidelities exceeding the distillation threshold, demonstrating all of the key single-qubit ingredients required for universal fault-tolerant operation. These results demonstrate that fault-tolerant circuits enable highly accurate logical primitives in current quantum systems. With improved two-qubit gates and the use of intermediate measurements, a stabilized logical qubit can be achieved.
Fast and high fidelity shuttling of spin qubits has been demonstrated in semiconductor quantum dot devices. Several architectures based on shuttling have been proposed; it has been suggested that singlet-triplet (dual-spin) qubits could be optimal for the highest shuttling fidelities. Here we present a fault-tolerant framework for quantum error correction based on such dual-spin qubits, establishing them as a natural realisation of erasure qubits within semiconductor architectures. We introduce a hardware-efficient leakage-detection protocol that automatically projects leaked qubits back onto the computational subspace, without the need for measurement feedback or increased classical control overheads. When combined with the XZZX surface code and leakage-aware decoding, we demonstrate a twofold increase in the error correction threshold and achieve orders-of-magnitude reductions in logical error rates. This establishes the singlet-triplet encoding as a practical route toward high-fidelity shuttling and erasure-based, fault-tolerant quantum computation in semiconductor devices.
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Quantum computing can transform a great deal and this may be in the realms of cryptography, optimisation, as well as material science. However, it requires decoherence and gate imperfection which introduces large error rates thus are difficult to implement. The solution to these problems is a fundamental skill of making computing fault-tolerant by means of Quantum Error Correction Codes (QECCs). This paper gives a comparison of three common QECCs namely Shor, Steane and Surface Codes as well as creating a new Hybrid Code by combining the most desirable characteristics of the concatenated and topological codes. The Hybrid Code was executed and tried out with the Qiskit software where real depolarising noise models were utilised. It showed better performance in terms of logical fidelity, error rate suppression, resource overhead, and execution time. The results of the simulation show that the Hybrid Code always does better than traditional codes. This means that it might be used in scalable quantum structures. The work shows how important it is to balance performance and complexity, and it gives a useful model for the next generation of quantum error correction systems.