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arXiv:0712.1587 · Physical Review A

Planar multipole ion trap

Markus Debatin, Michael Kroener, Jochen Mikosch, Sebastian H. Trippel, Nathan Morrison, M. Reetz‐Lamour, Peter Woias, Roland Wester, Matthias Weidemüller

Published Mar 27, 2008• 29 citations
arXivHTMLPDF

Abstract

We report on the realization of a chip-based multipole ion trap manufactured using microelectromechanical systems technology, requiring minimal manual alignment of the electrodes. It provides ion confinement in an almost field-free volume between two planes of radiofrequency electrodes, deposited on glass substrates, which allows for optical access to the trap. An analytical model of the effective trapping potential is presented and compared with numerical calculations. Stable trapping of argon ions is achieved, and a lifetime of 16 s is measured. Electrostatic charging of the chip surfaces is studied and found to agree with a numerical estimate.

DOI
10.1103/physreva.77.033422

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An ion trap is a device to confine charged particles by utilizing electromagnetic fields.Since the trapped ions have a feasibility of the individual state manipulation, a long coherence time, and an ideal isolation from the surroundings, the ion-trap technology becomes one of the leading candidates for the physical implementation of quantum information processing.In order to build a large-scale integrated iontrap system for realizing complex quantum algorithms, microfabrication technologies have been applied to construct ion traps.The use of micro-electromechanical system (MEMS) ion-trap chip allows a scalable architecture of ion-trap arrays and integration of functional components to the trap chip, but a few side effects also arise.One of the most particular problems is stray fields generated by the charges accumulated on the sidewalls of thick dielectric pillars or the native oxide grown on metal surfaces, since the stray fields lead to ion micromotions which can cause heating and escape of the trapped ions.This dissertation presents a silicon surface ion-trap chip with dielectric sidewalls shielded by metal films.The oxide pillars supporting the top electrodes are fabricated to have overhang structures, and the upper and lower part of the pillars are coated by separate aluminum layers which are electrically isolated from each other.In order to evaluate the effects of the native ii metal oxide on the electrode surface to the charging phenomenon, a trap chip with an additional gold layer on the aluminum electrodes is also fabricated.An ultra-high vacuum (UHV) chamber, electrical connections, and an optical setup are prepared to trap 174 Yb + ions, and the ions are successfully trapped by using the experimental setup including the fabricated ion-trap chip.To evaluate the effectiveness of the proposed electrode structures, charging is intentionally induced on the chip surface by injecting a 355-nm pulse laser with 40-μW power perpendicularly to the chip surface.The intensity of the stray field is estimated by measuring the displacement of ion position after charging is induced.When the Al-based chips with exposed and Al-coated dielectric sidewalls are used, the standard deviation of the intensities of stray fields are 3.53, and 5.63 V/m, respectively.However, the standard deviation of the intensity of stray fields in the case of using Au-coated chip is 1.56 V/m, and any stray field is measured when the laser was injected on the surface or sidewalls of the gold-coated electrodes.These experimental results indicate that the gold coating on the surface of the aluminum electrodes and the sidewalls of dielectric pillars is effective for eliminating the generation of stray fields induced by static charges.

•Jan 1, 2017•0 citations
We report on the realization of a chip-based multipole ion trap manufactured using microelectromechanical systems technology, requiring minimal manual alignment of the electrodes. It provides ion confinement in an almost field-free volume between two planes of radiofrequency electrodes, deposited on glass substrates, which allows for optical access to the trap. An analytical model of the effective trapping potential is presented and compared with numerical calculations. Stable trapping of argon ions is achieved, and a lifetime of 16 s is measured. Electrostatic charging of the chip surfaces is studied and found to agree with a numerical estimate.
We investigate a planar ion chip design with a two-dimensional array of linear ion traps for the scalable quantum information processor. The segmented electrodes reside in a single plane on a substrate and a grounded metal plate, a combination of appropriate rf and DC potentials are applied to them for stable ion confinement, and the trap axes are located above the surface at a distance controlled by the electrodes' lateral extent and the substrate's height as discussed. The potential distributions are calculated using static electric field qualitatively. This architecture is conceptually simple and many current microfabrication techniques are feasible for the basic structure. It may provide a promising route for scalable quantum computers.
Abstract We describe a novel high aspect ratio radiofrequency linear ion trap geometry that is amenable to modern microfabrication techniques. The ion trap electrode structure consists of a pair of stacked conducting cantilevers resulting in confining fields that take the form of fringe fields from parallel plate capacitors. The confining potentials are modeled both analytically and numerically. This ion trap geometry may form the basis for large scale quantum computers or parallel quadrupole mass spectrometers. PACS: 39.25.+k, 03.67.Lx, 07.75.+h, 07.10+Cm 1
We investigate a planar ion chip design with a two-dimensional array of linear ion traps for scalable quantum information processing. Qubits are formed from the internal electronic states of trapped 40 Ca + ions. The segmented electrodes reside in a single plane on a substrate and a grounded metal plate separately, a combination of appropriate rf and DC potentials is applied to them for stable ion confinement. Every two adjacent electrodes can generate a linear ion trap in and between the electrodes above the chip at a distance dependent on the geometrical scale and other considerations. The potential distributions are calculated by using a static electric field qualitatively. This architecture provides a conceptually simple avenue to achieving the microfabrication and large-scale quantum computation based on the arrays of trapped ions.
Abstract A novel microfabricated ion trap chip that can geometrically minimize exposing trapped ions to stray charges on dielectric surfaces is developed. The new design utilizes a sloped loading slot to make the dielectric layers of the loading slot sidewalls invisible to the trapped ions. The designed loading slot is realized by applying silicon anisotropic etching processes, and the ion trap chip that contains the sloped loading slot is fabricated using microelectromechanical system processes. Stray charges induced by injecting an ultraviolet laser on the surface of the fabricated ion trap chip are experimentally characterized by measuring stray electric fields at the location of the trapped ions. The measured results are compared to those of a previous ion trap chip with a vertical loading slot. The magnitude of the measured stray electric field in the axial direction is within 1.5 V m−1 for the proposed ion trap chip, whereas it is approximately 10 V m−1 for the previously reported ion trap chip.
An ion trap is a device to confine charged particles by utilizing electromagnetic fields.Since the trapped ions have a feasibility of the individual state manipulation, a long coherence time, and an ideal isolation from the surroundings, the ion-trap technology becomes one of the leading candidates for the physical implementation of quantum information processing.In order to build a large-scale integrated iontrap system for realizing complex quantum algorithms, microfabrication technologies have been applied to construct ion traps.The use of micro-electromechanical system (MEMS) ion-trap chip allows a scalable architecture of ion-trap arrays and integration of functional components to the trap chip, but a few side effects also arise.One of the most particular problems is stray fields generated by the charges accumulated on the sidewalls of thick dielectric pillars or the native oxide grown on metal surfaces, since the stray fields lead to ion micromotions which can cause heating and escape of the trapped ions.This dissertation presents a silicon surface ion-trap chip with dielectric sidewalls shielded by metal films.The oxide pillars supporting the top electrodes are fabricated to have overhang structures, and the upper and lower part of the pillars are coated by separate aluminum layers which are electrically isolated from each other.In order to evaluate the effects of the native ii metal oxide on the electrode surface to the charging phenomenon, a trap chip with an additional gold layer on the aluminum electrodes is also fabricated.An ultra-high vacuum (UHV) chamber, electrical connections, and an optical setup are prepared to trap 174 Yb + ions, and the ions are successfully trapped by using the experimental setup including the fabricated ion-trap chip.To evaluate the effectiveness of the proposed electrode structures, charging is intentionally induced on the chip surface by injecting a 355-nm pulse laser with 40-μW power perpendicularly to the chip surface.The intensity of the stray field is estimated by measuring the displacement of ion position after charging is induced.When the Al-based chips with exposed and Al-coated dielectric sidewalls are used, the standard deviation of the intensities of stray fields are 3.53, and 5.63 V/m, respectively.However, the standard deviation of the intensity of stray fields in the case of using Au-coated chip is 1.56 V/m, and any stray field is measured when the laser was injected on the surface or sidewalls of the gold-coated electrodes.These experimental results indicate that the gold coating on the surface of the aluminum electrodes and the sidewalls of dielectric pillars is effective for eliminating the generation of stray fields induced by static charges.