Quantum error mitigation (QEM) bridges the gap between today's noisy NISQ hardware and fault-tolerant quantum computing by reducing the effect of hardware errors on expectation value estimates without the qubit overhead of full quantum error correction. This paper proposes the Quantum Error Mitigation Design (QEMD) framework, a systematic evaluation of six QEM techniques across four circuit families on IBM Quantum Eagle and IonQ Forte: Zero-Noise Extrapolation (ZNE), Probabilistic Error Cancellation (PEC), Clifford Data Regression (CDR), Symmetry Verification (SV), Dynamical Decoupling (DD), and a novel Adaptive Ensemble Mitigation (AEM) combining ZNE and CDR with context-aware technique selection. QEMD finds: ZNE 3-point Richardson provides the best cost-performance trade-off for QAOA and VQE circuits (4.8x overhead, 28.4pp error reduction); PEC provides the highest accuracy but at 48x shot overhead -- practical only for n <= 12; DD reduces coherence-limited errors by 18.4% on IonQ Forte at zero shot overhead; AEM outperforms all individual techniques by 6.4pp at 8.4x overhead. QEMD provides a decision guide mapping circuit type, qubit count, and shot budget to optimal QEM technique selection.
Quantum error mitigation (QEM) bridges the gap between today's noisy NISQ hardware and fault-tolerant quantum computing by reducing the effect of hardware errors on expectation value estimates without the qubit overhead of full quantum error correction. This paper proposes the Quantum Error Mitigation Design (QEMD) framework, a systematic evaluation of six QEM techniques across four circuit families on IBM Quantum Eagle and IonQ Forte: Zero-Noise Extrapolation (ZNE), Probabilistic Error Cancellation (PEC), Clifford Data Regression (CDR), Symmetry Verification (SV), Dynamical Decoupling (DD), and a novel Adaptive Ensemble Mitigation (AEM) combining ZNE and CDR with context-aware technique selection. QEMD finds: ZNE 3-point Richardson provides the best cost-performance trade-off for QAOA and VQE circuits (4.8x overhead, 28.4pp error reduction); PEC provides the highest accuracy but at 48x shot overhead -- practical only for n <= 12; DD reduces coherence-limited errors by 18.4% on IonQ Forte at zero shot overhead; AEM outperforms all individual techniques by 6.4pp at 8.4x overhead. QEMD provides a decision guide mapping circuit type, qubit count, and shot budget to optimal QEM technique selection.
Quantum error mitigation (QEM) is typically viewed as a suite of practical techniques for today's noisy intermediate-scale quantum devices, with limited relevance once fault-tolerant quantum computers become available. In this work, we challenge this conventional wisdom by showing that QEM can continue to provide substantial benefits in the era of quantum error correction (QEC), and in an even more efficient manner than it does on current devices. We introduce a framework for logical-level QEM that leverages soft information naturally produced by QEC decoders, requiring no additional data, hardware modifications, or runtime overhead beyond what QEC protocols already provide. Within this framework, we develop and analyze three logical-level QEM techniques: post-selection and runtime abort policies, probabilistic error cancellation, and zero-noise extrapolation. Our techniques reduce logical error rates by more than 100x while discarding fewer than 0.1% of shots; they also provide in situ characterization of logical channels for QEM protocols. As a proof of principle, we benchmark our approach using a surface-code architecture and two state-of-the-art decoders based on tensor-network contraction and minimum-weight perfect matching. We evaluate logical-level QEM on random Clifford circuits and molecular simulation algorithms and find that, compared to previous approaches relying on QEC only or QEC combined with QEM, we can achieve up to 87.4% spacetime overhead savings. Our results demonstrate that logical-level QEM with QEC decoder soft information can reliably improve logical performance, underscoring the efficiency and usefulness of QEM techniques for fault-tolerant quantum computers.
Error mitigation is essential for unlocking the full potential of quantum algorithms and accelerating the timeline toward quantum advantage. As quantum hardware progresses to push the boundaries of classical simulation, efficient and robust error mitigation methods are becoming increasingly important for producing accurate and reliable outputs. However, existing error-mitigation approaches face a fundamental tradeoff between practical performance and reliability: heuristic methods such as zero-noise extrapolation (ZNE) enjoy faster runtime but lack accuracy guarantees, while rigorous techniques such as probabilistic error cancellation (PEC) provide unbiased estimates at prohibitive computational cost. We introduce a characterization-based, rigorously-grounded quantum error mitigation and error suppression framework (QESEM) that resolves this tradeoff by leveraging the accuracy guarantees of quasi-probabilistic mitigation with dramatically reduced overhead. We explain the innovative methods underlying QESEM and demonstrate its capabilities in the largest utility-scale error mitigation experiment based on an unbiased method. This experiment simulates the kicked transverse field Ising model with far-from-Clifford parameters on an IBM Heron device. We further validate QESEM's versatility across arbitrary quantum circuits and devices through high-accuracy error-mitigated molecular VQE circuits executed on IBM Heron and IonQ trapped-ion devices. Compared with multiple variants of the widely used zero-noise extrapolation method, QESEM consistently achieves higher accuracy while avoiding the prohibitive runtime overhead associated with PEC. These results mark a significant step forward in accuracy and reliability for running quantum circuits on current devices across diverse applications. Finally, we provide projections of QESEM's performance on near-term devices toward quantum advantage.
We present a general framework for applying linear quantum error mitigation (QEM) techniques directly to physical qubits within a logical qubit to suppress logical errors. By exploiting the linearity of quantum error correction (QEC), we demonstrate that any linear QEM method$\unicode{x2014}$including probabilistic error cancellation (PEC), zero-noise extrapolation (ZNE), and symmetry verification$\unicode{x2014}$can be integrated into the physical layer without requiring modifications to the subsequent QEC decoder. Applying this framework to memory experiments using PEC, we analytically prove and numerically verify that the leading-order contribution to the logical error can be removed, increasing the effective code distance by 2. Our simulations on repetition and rotated surface codes show that a distance-3 code with physical-level PEC achieves logical error rates lower than or similar to a distance-5 unmitigated code while using 40% and 64% fewer qubits, respectively. These results establish physical-level QEM as a widely compatible and resource-efficient strategy for enhancing logical performance in early fault-tolerant architectures.
Quantum noise poses a significant challenge for current near-term quantum computing. Quantum error mitigation (QEM) has therefore emerged as a key strategy, offering a practical and effective solution to reduce error impacts and enhance the performance of near-term variational quantum circuits (VQC). Given the lack of a comprehensive survey on this important topic in the literature, this article provides a dedicated overview of QEM, including both during and after the training of VQC. Specifically, during VQC training, we explore and discuss key QEM techniques such as optimal control and dynamical decoupling. For the post-processing stage of VQC, we will examine and discuss mitigation techniques such as zero-noise extrapolation (ZNE) and probabilistic error cancellation (PEC). For each of these QEM techniques, we will investigate the fundamentals, mitigation concepts, and recent advances. Subsequently, we also explore research toolboxes, including Mitiq and Qiskit Aer, as well as provide a case study that demonstrates contextual multi-armed bandit-guided ZNE. Finally, we discuss ongoing problems and future research initiatives, including ML-assisted mitigation and integration with error correction. This survey article aims to synthesize the state-of-the-art in QEM, offer organized insights across approaches, and propose potential paths towards error-resilient quantum computing.
Abstract The practical application of Noisy Intermediate-Scale Quantum (NISQ) hardware is fundamentally limited by gate-level noise, which corrupts computational results. This research addresses this challenge through the development and validation of a modular software framework for Quantum Error Mitigation (QEM). We implement and compare two leading QEM strategies: Zero-Noise Extrapolation (ZNE) and Probabilistic Error Cancellation (PEC). The framework is built using the Qiskit library and is validated using a realistic, hardware-calibrated noisy simulator that mimics the error characteristics of a real IBM Quantum device. Our methodology focuses on a robust implementation of ZNE via unitary folding and a proof-of-concept demonstration of the PEC algorithm. The framework's effectiveness is demonstrated on a simulated noisy backend where, for a 3-qubit Greenberger-Horne-Zeilinger (GHZ) state, the baseline state fidelity was increased from 93.5% to 97.3% via ZNE, corresponding to a 59% reduction in the state's infidelity. This work provides a practical demonstration of how software-based error mitigation can enhance the reliability of quantum computations on current noisy hardware.
We present a simple, malleable and low-overhead approach for improving generic biased quantum error mitigation (QEM) methods, achieving up to 15% fidelity improvements over standard QEM on 100-qubit circuits with up to 2000 entangling gates. We do so by constructing verifiable benchmark circuits which mirror the application circuit's native-gate structure and thus noise profile. These circuits can be used to benchmark and mitigate the bias of the underlying error mitigation method, requiring only the application circuit and hardware native gate set. We present two methods for generating benchmark circuits; one is agnostic to the target hardware at the expense of a small overhead of single-qubit gates, while the other is specific to the IBM superconducting hardware and has no gate overhead. As a corollary, we introduce benchmarked-noise zero-noise extrapolation (bnZNE) as a simple adaptation of zero-noise extrapolation (ZNE), one of the most popular error mitigation methods. We consider as an example the bias-mitigated ZNE and bnZNE of Trotterized Hamiltonian simulations, observing that our approaches outperform standard ZNE using both small-scale classical simulations and 100-qubit utility-scale experiments on the IBM superconducting hardware. We consider the measurement of both single-site observables as well as two-site correlations along a one-dimensional qubit chain. We also provide a software package for implementing the error mitigation techniques used in this research.