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arXiv:2603.10224

Reducing Quantum Error Mitigation Bias Using Verifiable Benchmark Circuits

Joseph Harris, Kevin Lively, Peter Schuhmacher

quant-phSubmitted Mar 10, 2026• Announced Mar 12, 2026• 0 citations
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Abstract

We present a simple, malleable and low-overhead approach for improving generic biased quantum error mitigation (QEM) methods, achieving up to 15% fidelity improvements over standard QEM on 100-qubit circuits with up to 2000 entangling gates. We do so by constructing verifiable benchmark circuits which mirror the application circuit's native-gate structure and thus noise profile. These circuits can be used to benchmark and mitigate the bias of the underlying error mitigation method, requiring only the application circuit and hardware native gate set. We present two methods for generating benchmark circuits; one is agnostic to the target hardware at the expense of a small overhead of single-qubit gates, while the other is specific to the IBM superconducting hardware and has no gate overhead. As a corollary, we introduce benchmarked-noise zero-noise extrapolation (bnZNE) as a simple adaptation of zero-noise extrapolation (ZNE), one of the most popular error mitigation methods. We consider as an example the bias-mitigated ZNE and bnZNE of Trotterized Hamiltonian simulations, observing that our approaches outperform standard ZNE using both small-scale classical simulations and 100-qubit utility-scale experiments on the IBM superconducting hardware. We consider the measurement of both single-site observables as well as two-site correlations along a one-dimensional qubit chain. We also provide a software package for implementing the error mitigation techniques used in this research.

Comments
17 pages, 11 figures

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We present a simple, malleable and low-overhead approach for improving generic biased quantum error mitigation (QEM) methods, achieving up to 15% fidelity improvements over standard QEM on 100-qubit circuits with up to 2000 entangling gates. We do so by constructing verifiable benchmark circuits which mirror the application circuit's native-gate structure and thus noise profile. These circuits can be used to benchmark and mitigate the bias of the underlying error mitigation method, requiring only the application circuit and hardware native gate set. We present two methods for generating benchmark circuits; one is agnostic to the target hardware at the expense of a small overhead of single-qubit gates, while the other is specific to the IBM superconducting hardware and has no gate overhead. As a corollary, we introduce benchmarked-noise zero-noise extrapolation (bnZNE) as a simple adaptation of zero-noise extrapolation (ZNE), one of the most popular error mitigation methods. We consider as an example the bias-mitigated ZNE and bnZNE of Trotterized Hamiltonian simulations, observing that our approaches outperform standard ZNE using both small-scale classical simulations and 100-qubit utility-scale experiments on the IBM superconducting hardware. We consider the measurement of both single-site observables as well as two-site correlations along a one-dimensional qubit chain. We also provide a software package for implementing the error mitigation techniques used in this research.
The pursuit of practical quantum utility on near-term quantum processors is critically challenged by their inherent noise. Quantum error mitigation (QEM) techniques are leading solutions to improve computation fidelity with relatively low qubit-overhead, while full-scale quantum error correction remains a distant goal. However, QEM techniques incur substantial measurement overheads, especially when applied to families of quantum circuits parameterized by classical inputs. Focusing on zero-noise extrapolation (ZNE), a widely adopted QEM technique, here we devise the surrogate-enabled ZNE (S-ZNE), which leverages classical learning surrogates to perform ZNE entirely on the classical side. Unlike conventional ZNE, whose measurement cost scales linearly with the number of circuits, S-ZNE requires only constant measurement overhead for an entire family of quantum circuits, offering superior scalability. Theoretical analysis indicates that S-ZNE achieves accuracy comparable to conventional ZNE in many practical scenarios, and numerical experiments on up to 100-qubit ground-state energy and quantum metrology tasks confirm its effectiveness. Our approach provides a template that can be effectively extended to other quantum error mitigation protocols, opening a promising path toward scalable error mitigation.
Recent hundred-qubit processors represent a significant hardware advancement, but current limitations prevent effective quantum error correction (QEC), necessitating reliance on quantum error mitigation (QEM) to enhance result fidelity from quantum computers. Our paper introduces a noise-aware folding technique that enhances Zero-Noise Extrapolation (ZNE) by leveraging the noise characteristics of target quantum hardware to fold circuits more efficiently. Unlike traditional ZNE approaches assuming uniform error distribution, our method redistributes noise using calibration data based on hardware noise models. By employing a noise-adaptive compilation method combined with our proposed folding mechanism, we enhance the ZNE accuracy of quantum gate-based computing using superconducting quantum computers. This paper highlights the uniqueness of our method, summarizes noise accumulation, presents the scaling algorithm, and compares the reliability of our method with those of existing models using linear extrapolation model. Experimental results show that compared to existing folding methods, our approach achieved up to a 23.6% improvement on quantum computer simulators and up to a 44.8% improvement on real quantum computers, with statistical confidence intervals indicating stable performance gains across circuit scales.
Abstract The pursuit of practical quantum utility on near-term quantum processors is critically challenged by their inherent noise. Quantum error mitigation (QEM) techniques are leading solutions to improve computation fidelity with relatively low qubit-overhead, while full-scale quantum error correction remains a distant goal. However, QEM techniques incur substantial measurement overheads, especially when applied to families of quantum circuits parameterized by classical inputs. Focusing on zero-noise extrapolation (ZNE), a widely adopted QEM technique, here we devise the surrogate-enabled ZNE (S-ZNE), which leverages classical learning surrogates to perform ZNE entirely on the classical side. Unlike conventional ZNE, whose measurement cost scales linearly with the number of circuits, S-ZNE requires only constant measurement overhead for an entire family of quantum circuits, offering superior scalability. Theoretical analysis indicates that S-ZNE achieves accuracy comparable to conventional ZNE in many practical scenarios, and numerical experiments on up to 100-qubit ground-state energy and quantum metrology tasks confirm its effectiveness. Our approach provides a template that can be effectively extended to other quantum error mitigation protocols, opening a promising path toward scalable error mitigation.
Reliable benchmarking of Quantum Error Mitigation (QEM) requires distinguishing genuine improvements from artefacts of the post-processing arithmetic. In this paper, we expose a failure mode in Richardson Zero-Noise Extrapolation (ZNE), a widely used technique routinely (and often implicitly) relied upon in benchmarks and experiments. When noise amplification operates beyond usable signals - a regime that is quickly reached on current hardware for non-trivial circuits - we show that the extrapolation no longer reflects the underlying physics, but collapses into a fixed rescaling of a single noisy measurement, producing a bogus apparent improvement that is independent of noise amplification. This poses a rarely considered threat to the validity of many empirical evaluations in quantum computing. Measurements on real hardware (IQM Euro-Q-Exa) confirm this collapse with ordinary folding alone: as circuit depth erodes the signal, the reported estimate decouples from the truth and overshoots the ideal by up to 21%. We further introduce a matched-cost "garbage-folding" negative control that carries no usable signal yet reports a larger apparent improvement than genuine folding - showing that the magnitude of an improvement is not evidence of its correctness - alongside a zero-cost check flagging the artefact from data a benchmark already holds. We distil both into a short reporting checklist for ZNE benchmarks.
Quantum error mitigation (QEM) bridges the gap between today's noisy NISQ hardware and fault-tolerant quantum computing by reducing the effect of hardware errors on expectation value estimates without the qubit overhead of full quantum error correction. This paper proposes the Quantum Error Mitigation Design (QEMD) framework, a systematic evaluation of six QEM techniques across four circuit families on IBM Quantum Eagle and IonQ Forte: Zero-Noise Extrapolation (ZNE), Probabilistic Error Cancellation (PEC), Clifford Data Regression (CDR), Symmetry Verification (SV), Dynamical Decoupling (DD), and a novel Adaptive Ensemble Mitigation (AEM) combining ZNE and CDR with context-aware technique selection. QEMD finds: ZNE 3-point Richardson provides the best cost-performance trade-off for QAOA and VQE circuits (4.8x overhead, 28.4pp error reduction); PEC provides the highest accuracy but at 48x shot overhead -- practical only for n <= 12; DD reduces coherence-limited errors by 18.4% on IonQ Forte at zero shot overhead; AEM outperforms all individual techniques by 6.4pp at 8.4x overhead. QEMD provides a decision guide mapping circuit type, qubit count, and shot budget to optimal QEM technique selection.
Abstract Quantum computing has recently emerged as a novel paradigm for solving problems otherwise intractable on classical computers, yet the practical progress of quantum computers is severely impacted by noise, decoherence, and imperfect gate operations in Noisy Intermediate-Scale Quantum (NISQ) devices. Specific to IBM Quantum hardware, imperfections due to readout error, gate errors, and device drift, which depends on time, resolves limits for the accuracy of outputs from our algorithms. The mitigation strategies currently used, for example, Measurement Error Mitigation (MEM), Zero Noise Extrapolation (ZNE), and Clifford Data Regression (CDR), offer improvement over raw, unmitigated outputs, but they are static and not dynamic; the reduction of noise in within an NISQ device is temporal and can vary in patterns that are non-zero. In addition to this, using the conventional methods provides inconsistent and suboptimal results.This study will provide enhanced reliability with respect to performing quantum computation on IBM Quantum hardware with a unique mitigation framework that is adaptive and computationally efficient for a high-fidelity output. The problem taken on here is the failure of existing error mitigation strategies to provide adaptive noise compensation, as they assume a statically-distributed error, despite the performance-related characteristics already being documented in regards to calibration drift and variation over time.To achieve this, we propose a Hybrid Adaptive Error Mitigation (HAEM) approach that includes baseline measurement error mitigation and an additional correction layer that utilizes realtime calibration information, along with lightweight machine learning models. The approach can be broken down into three steps: (i) perform standard measurement error mitigation to reduce classical readout noise, (ii) execute compact calibration circuits, such as Bell states, GHZ states and Clifford benchmarks to capture then current error profile of the device, and (iii) use a lightweight machine learning model (having been trained on historical and newest calibration data) to dynamically change the mitigation weights applied for the target quantum algorithm. All implementation is done using Qiskit Runtime to ensure low-latency execution, and we completed experiments on both Qiskit Aer noisy simulators and IBM Quantum devices.Initial results suggest HAEM improved the outputs of quantum algorithms' fidelity compared to the unmitigated runs and the baseline measurement error mitigation (MEM) runs. On the noisy simulators, HAEM increased fidelity from a raw performance of 0.65 to 0.87, nearly a 34% improvement. In fairer hardware-like scenarios, fidelity-on-average was persistently 12% better than MEM, with nearly equal time duration for the additional adaptive measurements. The adaptive aspect of HAEM consistently supported subsequent calibration cycles of the device and was effective to continue providing fidelity improvements despite the static mitigation performance degrading.To sum up, the proposed HAEM framework is a modern and viable alternative for error mitigation which brings together the benefits of baseline approaches with corrections that are driven by fixed-function error-corrective, adaptive learning. As both learning-based and standard baseline approaches can only achieve fixed levels of performance, HAEM, through its use of noise mitigation both at execution time and through correlating it with standard data, provides a route towards reliable quantum computations on current IBM hardware. HAEM also presents a contribution to the NISQ error-resilient landscape, and however it is intended that it will continue to improve future applications of hybrid workflows of quantum and classical computation where error mitigation and resilience is important.