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Contract-First Quantum Reoptimization

Oguike Ahaneku

Published Sep 17, 2026• 0 citations
Publisher

Abstract

Five public quantum workloads showcased by established quantum compilation and optimization toolchains are reanalyzed using a Quantum Transfer Level (QTL) design and verification framework. Each workload is frozen by source construction, required input/output contract, tolerance policy, and allowed implementation interface. Five successive QTL passes are then applied, with each pass taking the optimized parent produced by the preceding pass as its new source. The central result concerns obligation strength: additional reductions appear when the external contract is weaker than the semantic obligation preserved by the reference toolchain, while those reductions disappear when both obligations coincide. In a Q-CTRL phase-estimation benchmark, 36 quantum wires and 647 two-qubit gate objects reduce to one reusable wire with no two-qubit gates under a dynamic interface. A fixed International Business Machines (IBM) Qiskit Grover benchmark yields a three-entangler parent and later an exact classical sampler with optimal 2.25-bit expected fair-bit cost. A Quantinuum HyperTKET Quantum Approximate Optimization Algorithm (QAOA) tree workload reduces to an exact tree-message parent with 21 output classes and two canonical boundary-record families. A Superstaq Bernstein--Vazirani showcase reaches a deterministic six-bit contract. A Berkeley Quantum Synthesis Toolkit (BQSKit) three-qubit Quantum Fourier Transform (QFT) control case preserves the published five Controlled-NOT (CNOT) implementation under the same full-unitary interface, with further compression only after explicit control-interface redesign. Numerical, combinatorial, and prior-art checks support each trajectory.

DOI
10.5281/zenodo.22811742

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Five public quantum workloads showcased by established quantum compilation and optimization toolchains are reanalyzed using a Quantum Transfer Level (QTL) design and verification framework. Each workload is frozen by source construction, required input/output contract, tolerance policy, and allowed implementation interface. Five successive QTL passes are then applied, with each pass taking the optimized parent produced by the preceding pass as its new source. The central result concerns obligation strength: additional reductions appear when the external contract is weaker than the semantic obligation preserved by the reference toolchain, while those reductions disappear when both obligations coincide. In a Q-CTRL phase-estimation benchmark, 36 quantum wires and 647 two-qubit gate objects reduce to one reusable wire with no two-qubit gates under a dynamic interface. A fixed International Business Machines (IBM) Qiskit Grover benchmark yields a three-entangler parent and later an exact classical sampler with optimal 2.25-bit expected fair-bit cost. A Quantinuum HyperTKET Quantum Approximate Optimization Algorithm (QAOA) tree workload reduces to an exact tree-message parent with 21 output classes and two canonical boundary-record families. A Superstaq Bernstein--Vazirani showcase reaches a deterministic six-bit contract. A Berkeley Quantum Synthesis Toolkit (BQSKit) three-qubit Quantum Fourier Transform (QFT) control case preserves the published five Controlled-NOT (CNOT) implementation under the same full-unitary interface, with further compression only after explicit control-interface redesign. Numerical, combinatorial, and prior-art checks support each trajectory.
A Quantum Transfer Level (QTL) design and verification framework is applied to seven public quantum-computing workloads in a fully automated two-iteration pipeline. The first pass emits optimized parent contracts; the second consumes those emitted contracts directly as its new inputs. Optimization typically completes in minutes per benchmark on the development machine, excluding independent certification sweeps. First-pass results are retained: QPE gives 7 → 3 controlled phases; the HRS multiplier gives a 63.3% CNOT-equivalent proxy reduction at n = 64; exact-grid HHL becomes a two-qubit parent; generic degree-601 QSVT retains all 601 signal queries while a structured 2 × 2 instance becomes a two-qubit parent; Sycamore gives 3263 → 430 dressed parents; G81 becomes 40,000 exact 18-qubit edge evaluators; and the IBM/Nature Ising workload gives 5420 → 3178 → 1511 → 20 across distinct representation levels. In the second iteration, QPE, exact-grid HHL, and structured QSVT become one instruction only by definition of their declared parent interfaces, whereas generic QSVT remains at 601 queries. Sycamore requires 430/430 numerical syntheses: XI, Y I, IX, IY, (XX + Y Y )/2 close on su(4), so absorption of the 1113 one-qubit pulses gives 1543 → 430 control instructions with full-output DTV ≤ 1.92022 × 10^−11 under a redesigned interface, not existing Google firmware. G81 collapses 40,000 → 88 exact gauge/reflection classes; at declared p = 2 angles, the 88-class weighted objective 5713.216637468534 matches a direct 40,000-edge local evaluation within 4.82 × 10^−10. IBM gives 3178 → 1511 bounded parent-native patch instructions. No physical-hardware execution is reported.
The public 53-qubit, 20-cycle Google Sycamore random-circuit-sampling workload is used to test whether source-wire count must equal peak coherent physical width when the external contract is the fixed |0>^53 preparation and the complete 53-bit computational-basis sampling distribution. Quantum Transfer Level (QTL) design separates the external contract, causal transition structure, fused parent representation, and physical lowering. The frozen 3263-operation source is normalized exactly to 430 dressed two-coordinate parents. A certified fusion topology then reduces the design object to a 20-parent STATIC24 abstraction with 24 work roles, 29 terminal relation roles, maximum source bag size eight, maximum separator size five, and no unresolved active surplus-field crossing. Physical lowering uses future-canonical relational closure (FCRC): the crossing object at a legal boundary is the complete future-canonical row-isometry record Qc with inherited gauge, not source-wire count, separator width, or rank alone. Exact cut advancement closes the left boundary through parent P08 and the right boundary through parent P12, producing two five-axis inherited records. The inherited-global P13–P19 root is then a 4096 × 256 isometry generated by 60 root-owned two-coordinate factors. The final fixed-register realization uses 24 physical slots but has coherent-width profile 22 → 15 → 11 → 14 → 17 → 19 → 12, giving a peak of 22 coherent qubits and zero extra persistent quantum qubits. The program emits all 53 terminal labels exactly once, partitions all 430 factor instances as 190 + 180 + 60, and requires no feed-forward control or runtime branch selection. The final-assembly report records compatibility with the frozen terminal instrument under the upstream certificate semantics; the exact full-distribution statement DTV = 0 remains anchored to the analytical canonical conditional-state proof in the main manuscript. Floating-point reconstruction and completeness diagnostics remain at approximately 10^−14–10^−16 and are reported separately from the exact algebraic claim. Active rectangular Stinespring/isometry columns for the two large leaves have been materialized without dense square completion; hardware-native one- and two-qubit decomposition, routing, pulse scheduling, noise performance, and wall-clock runtime remain downstream engineering tasks. The scoped public evidence package accompanying this document contains a topology-only witness, an independent topology re-verification, selected left/right numerical certificates, a rectangular-emission report, and a final-assembly report. It is not presented as the complete historical certificate chain or as a numerical-regeneration payload for every reported residual.
Quantum Transfer Level (QTL) is applied as a contract-first design and verification framework to the Willow surface-code memory. This manuscript reports a milestone rather than a completed physical optimization and makes a central distinction between hardware width and future-distinguishable boundary-record width. Under the frozen logical-X and logical-Z eigenstate functional contract, initialization and cycle-boundary transformations reduce exactly, ideal data-qubit leakage removal closes side-locally, repeated ideal syndrome cycles collapse to one quantum extraction followed by classical repetitions, and the complete future response is a sparse affine transition family. After the first ideal extraction, no branch-dependent coherent record is required; the full ideal benchmark is generated by parity and exclusive OR (XOR) logic with 48 fresh unbiased bits. Separately, a fixed-basis stabilizer theorem gives a raw distance-seven Pauli-frame boundary record of 48 syndrome coordinates plus one logical-flip coordinate, with a one-bit conditioned residual only when the exact syndrome is already past context. A structural stochastic-fault extension yields conditioned weighted-history partitions, a binary group algebra, and Walsh-character attenuation. In the canonical code-capacity data-Pauli model, the logical-difference distance equals the code distance and the minimum branch-competition barrier is (d + 1)/2; this statement is not promoted to circuit-level superconducting-inspired 1000-ns (SI1000) noise, where hook and correlated mechanisms can reduce effective fault distance. A published distance-three/distance-five constant-Λ extrapolation agrees with the published distance-seven mean at the percent level, as expected from standard below-threshold scaling, and is reported only as a consistency check. At the milestone boundary, exactclosure-complete SI1000 cut certification and the remaining physical QTL optimization remained open.
Quantum processors have crossed the one-hundred-qubit mark, but noise continues to limit circuit performance, while full quantum error correction remains too costly for routine use. Error suppression and mitigation therefore play an important role in extracting value from current hardware, yet independent comparisons of commercial solutions on identical workloads and devices remain scarce. We benchmark IBM Qiskit Runtime, Q-CTRL Performance Management, and Qedma QESEM on IBM Pittsburgh, a 156-qubit IBM Quantum Heron r3 processor. For Sampler workloads, we run Bernstein-Vazirani, quantum phase estimation, GHZ-state preparation, and randomized mirror circuits with up to 100 measured qubits, comparing raw execution, IBM measurement twirling, and Q-CTRL. For Estimator workloads, we measure chain-averaged magnetization and correlation observables of an eight-layer transverse-field Ising circuit at 25, 50, and 75 qubits against an exact matrix-product-state reference, comparing IBM raw execution, IBM TREX plus twirling, Q-CTRL, and QESEM. Q-CTRL produced the best results on the three structured Sampler workloads while keeping reported QPU times within the same order as the IBM configurations. Across six Ising observable and system-size cases, aggregate mean absolute error was 0.0883 for IBM raw execution, 0.0807 for IBM TREX plus twirling, 0.0285 for Q-CTRL, and 0.0188 for QESEM. Relative to raw execution, Q-CTRL and QESEM reduced aggregate error by factors of 3.10 and 4.70, respectively, while QESEM used 7.5 to 11.1 times the reported QPU time of Q-CTRL. These results show that managed error suppression and mitigation can substantially improve current hardware performance, but with distinct accuracy and execution-time tradeoffs.
The public 53-qubit, 20-cycle Google Sycamore random-circuit-sampling workload is used to test whether physical quantum width can be reduced when the frozen preparation and complete computational-basis sampling distribution, rather than the source wire diagram, define the external contract. The analysis is performed at the Quantum Transfer Level (QTL). Exact normalization maps the 3263-operation source to 430 dressed two-coordinate parents, while legal retiming gives an exact 53 → 52 live-qubit baseline. The active interaction graph has a 24-vertex cover, while its first interaction layer contains a matching of 24 disjoint edges; weak matching–cover dualitytherefore fixes 24 as the minimum interaction-separating frontier width. Compose-first temporal transfers on that frontier exhibit geometric suppression of their transverse defect with repetition depth, reaching the 10^−16 scale at the five repetitions of the frozen schedule. The final lowering changes parent class rather than forcing the transverse transfers to be unitary. One frontier output is emitted before the first instrument, freeing its physical carrier; the remaining 23 conditional-state carriers retain the frontier record and the released carrier is reused as a Stinespring meter. The peak width therefore remains 24 rather than increasing to 25. Recursive deterministic instruments emit the complementary outputs and leave the exact conditional state of the final 23 bits, proving equality of the complete 53-bit sampling distribution and hence DTV = 0 in exact arithmetic. Generic conditional-state preparation and instrument synthesis may remain exponentially expensive, so the result is a physical-width result rather than an efficiency claim.
We present an analysis of quantum circuit fidelity across the full compilation stack, from high-level gate optimization through pulse-level control. We connect a C++ circuit optimizer to a per-gate Lindblad master-equation fidelity model whose decoherence channels are cross-validated against qiskit-dynamics and whose absolute predictions are benchmarked against execution on real hardware. Across a campaign of 4,452 experiment runs over 371 benchmark circuits, gate cancellation provides the dominant improvement (d=1.66d = 1.66d=1.66, 72% of circuits improved), while circuit size and pulse duration are the strongest negative predictors of process fidelity (input gates r=−0.78r = -0.78r=−0.78; pulse duration r=−0.73r = -0.73r=−0.73, R2=0.53R^2 = 0.53R2=0.53). A formal ablation study shows that pass ordering has no significant effect on two-qubit gate reduction (Kruskal--Wallis p=0.302p = 0.302p=0.302). Comparing against Qiskit transpilation levels, we show that two-qubit gate count, not total gate count, is the hardware-relevant metric: our optimizer attains superior two-qubit reduction on structured circuits (87.8% on QFT, 100% on QAOA) whereas Qiskit's larger total-gate reduction is dominated by single-qubit (u3u_3u3​) consolidation. Finally, executing eight circuits on the IQM Resonance Garnet processor (8/8 jobs completed, job identifiers released) reveals that the model is a consistent upper bound: it preserves the relative difficulty ordering of circuits but overestimates absolute fidelity by a mean of 0.49, quantifying the error budget (crosstalk, leakage, readout) outside a T1T_1T1​/T2T_2T2​/depolarizing model. We release the framework, data, and scripts as open source.