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arXiv:2608.05202

Quantum Error Management in Practice: A Cross-Stack Benchmark

Daniel Sierra-Sosa, Begonya Garcia-Zapirain, Cristian Marquez, Kelly Garces

quant-phSubmitted Aug 5, 2026• Announced Aug 6, 2026• 0 citations
arXivHTMLPDF

Abstract

Quantum processors have crossed the one-hundred-qubit mark, but noise continues to limit circuit performance, while full quantum error correction remains too costly for routine use. Error suppression and mitigation therefore play an important role in extracting value from current hardware, yet independent comparisons of commercial solutions on identical workloads and devices remain scarce. We benchmark IBM Qiskit Runtime, Q-CTRL Performance Management, and Qedma QESEM on IBM Pittsburgh, a 156-qubit IBM Quantum Heron r3 processor. For Sampler workloads, we run Bernstein-Vazirani, quantum phase estimation, GHZ-state preparation, and randomized mirror circuits with up to 100 measured qubits, comparing raw execution, IBM measurement twirling, and Q-CTRL. For Estimator workloads, we measure chain-averaged magnetization and correlation observables of an eight-layer transverse-field Ising circuit at 25, 50, and 75 qubits against an exact matrix-product-state reference, comparing IBM raw execution, IBM TREX plus twirling, Q-CTRL, and QESEM. Q-CTRL produced the best results on the three structured Sampler workloads while keeping reported QPU times within the same order as the IBM configurations. Across six Ising observable and system-size cases, aggregate mean absolute error was 0.0883 for IBM raw execution, 0.0807 for IBM TREX plus twirling, 0.0285 for Q-CTRL, and 0.0188 for QESEM. Relative to raw execution, Q-CTRL and QESEM reduced aggregate error by factors of 3.10 and 4.70, respectively, while QESEM used 7.5 to 11.1 times the reported QPU time of Q-CTRL. These results show that managed error suppression and mitigation can substantially improve current hardware performance, but with distinct accuracy and execution-time tradeoffs.

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Enhancing Quantum Computation Accuracy on Ibm Quantum Hardware Through Advanced Error Mitigation Strategies

D Lakshanya, Nandha Kumar P, V. Karthick

Abstract Quantum computing has recently emerged as a novel paradigm for solving problems otherwise intractable on classical computers, yet the practical progress of quantum computers is severely impacted by noise, decoherence, and imperfect gate operations in Noisy Intermediate-Scale Quantum (NISQ) devices. Specific to IBM Quantum hardware, imperfections due to readout error, gate errors, and device drift, which depends on time, resolves limits for the accuracy of outputs from our algorithms. The mitigation strategies currently used, for example, Measurement Error Mitigation (MEM), Zero Noise Extrapolation (ZNE), and Clifford Data Regression (CDR), offer improvement over raw, unmitigated outputs, but they are static and not dynamic; the reduction of noise in within an NISQ device is temporal and can vary in patterns that are non-zero. In addition to this, using the conventional methods provides inconsistent and suboptimal results.This study will provide enhanced reliability with respect to performing quantum computation on IBM Quantum hardware with a unique mitigation framework that is adaptive and computationally efficient for a high-fidelity output. The problem taken on here is the failure of existing error mitigation strategies to provide adaptive noise compensation, as they assume a statically-distributed error, despite the performance-related characteristics already being documented in regards to calibration drift and variation over time.To achieve this, we propose a Hybrid Adaptive Error Mitigation (HAEM) approach that includes baseline measurement error mitigation and an additional correction layer that utilizes realtime calibration information, along with lightweight machine learning models. The approach can be broken down into three steps: (i) perform standard measurement error mitigation to reduce classical readout noise, (ii) execute compact calibration circuits, such as Bell states, GHZ states and Clifford benchmarks to capture then current error profile of the device, and (iii) use a lightweight machine learning model (having been trained on historical and newest calibration data) to dynamically change the mitigation weights applied for the target quantum algorithm. All implementation is done using Qiskit Runtime to ensure low-latency execution, and we completed experiments on both Qiskit Aer noisy simulators and IBM Quantum devices.Initial results suggest HAEM improved the outputs of quantum algorithms' fidelity compared to the unmitigated runs and the baseline measurement error mitigation (MEM) runs. On the noisy simulators, HAEM increased fidelity from a raw performance of 0.65 to 0.87, nearly a 34% improvement. In fairer hardware-like scenarios, fidelity-on-average was persistently 12% better than MEM, with nearly equal time duration for the additional adaptive measurements. The adaptive aspect of HAEM consistently supported subsequent calibration cycles of the device and was effective to continue providing fidelity improvements despite the static mitigation performance degrading.To sum up, the proposed HAEM framework is a modern and viable alternative for error mitigation which brings together the benefits of baseline approaches with corrections that are driven by fixed-function error-corrective, adaptive learning. As both learning-based and standard baseline approaches can only achieve fixed levels of performance, HAEM, through its use of noise mitigation both at execution time and through correlating it with standard data, provides a route towards reliable quantum computations on current IBM hardware. HAEM also presents a contribution to the NISQ error-resilient landscape, and however it is intended that it will continue to improve future applications of hybrid workflows of quantum and classical computation where error mitigation and resilience is important.

•Nov 18, 2025•1 citation

Hardware-Efficient Error Mitigation and Shot-Efficient Sampling on IBM Quantum Hardware

Sumit Chongder

We experimentally study error mitigation and finite-shot sampling on superconducting quantum hardware under a constrained execution budget. The study combines calibration-aware qubit selection, circuit-depth scaling, zero-noise extrapolation, dynamical decoupling, readout-error mitigation, and repeated-shot estimation on an IBM Quantum processor. Experiments are organized across ideal simulation, noise-model simulation, and physical-device execution to separate sampling uncertainty from device-induced error. We investigate how mitigation performance changes with circuit depth, effective noise scale, qubit connectivity, and measurement budget, and quantify accuracy using expectation-value error, mean-squared error, statistical uncertainty, and mitigation gain. A fixed hardware-execution budget is used to evaluate shot allocation strategies and repeated measurements without relying on unlimited sampling. The resulting analysis provides a hardware-aware characterization of when mitigation improves expectation-value estimation and when finite-shot fluctuations offset the benefit of additional mitigation overhead. The implementation uses contemporary Qiskit and IBM Quantum Runtime workflows and is designed to provide reproducible experimental evidence for error-mitigation studies on current quantum processors.

quant-pharXiv:2608.28535•Aug 31, 2026•0 citations

Reliable high-accuracy error mitigation for utility-scale quantum circuits

Dorit Aharonov, Ori Alberton, Itai Arad +36 more

Error mitigation is essential for unlocking the full potential of quantum algorithms and accelerating the timeline toward quantum advantage. As quantum hardware progresses to push the boundaries of classical simulation, efficient and robust error mitigation methods are becoming increasingly important for producing accurate and reliable outputs. However, existing error-mitigation approaches face a fundamental tradeoff between practical performance and reliability: heuristic methods such as zero-noise extrapolation (ZNE) enjoy faster runtime but lack accuracy guarantees, while rigorous techniques such as probabilistic error cancellation (PEC) provide unbiased estimates at prohibitive computational cost. We introduce a characterization-based, rigorously-grounded quantum error mitigation and error suppression framework (QESEM) that resolves this tradeoff by leveraging the accuracy guarantees of quasi-probabilistic mitigation with dramatically reduced overhead. We explain the innovative methods underlying QESEM and demonstrate its capabilities in the largest utility-scale error mitigation experiment based on an unbiased method. This experiment simulates the kicked transverse field Ising model with far-from-Clifford parameters on an IBM Heron device. We further validate QESEM's versatility across arbitrary quantum circuits and devices through high-accuracy error-mitigated molecular VQE circuits executed on IBM Heron and IonQ trapped-ion devices. Compared with multiple variants of the widely used zero-noise extrapolation method, QESEM consistently achieves higher accuracy while avoiding the prohibitive runtime overhead associated with PEC. These results mark a significant step forward in accuracy and reliability for running quantum circuits on current devices across diverse applications. Finally, we provide projections of QESEM's performance on near-term devices toward quantum advantage.

arXiv:2508.10997•Aug 14, 2025•0 citations

Repetition-code-based readout error detection and correction across hardware platforms and generations

Csaba Czabán, Orsolya Kálmán, Sergey N. Filippov +1 more

Readout errors are one of the dominant sources of noise in current quantum processors, limiting both expectation-value estimation and sampling-based applications. Since they affect only the classical measurement outcomes, they can be addressed using classical coding techniques: immediately before measurement, each data qubit is redundantly encoded with ancilla qubits, and the resulting bit string is decoded either by post-selection or by majority voting. Unlike conventional readout error mitigation, which corrects only aggregate quantities such as expectation values, this approach operates on individual measurement shots and can therefore produce approximately corrected samples. We present a systematic cross-platform and cross-generation experimental evaluation of repetition-code readout error detection and correction. We benchmark the same protocol on IBM Heron r1-r3 superconducting processors and Quantinuum H1 and H2 trapped-ion processors while independently varying the code distance, hardware generation, and encoding layout. We find that both error detection and correction improve readout fidelity on every device and generation tested, even as the unencoded baseline improves substantially across successive hardware releases. At the same time, the value of additional redundancy depends strongly on the underlying hardware. On superconducting processors, the extra gate errors introduced by the encoding rapidly offset its benefits, whereas on trapped-ion processors the much lower gate error rates allow larger code distances to remain advantageous.

quant-pharXiv:2606.30606•Jun 30, 2026•0 citations

Implementing QESEM's High-Accuracy Error Mitigation on a Quantum Computer: a Water Potential Energy Surface Study

Renato Olarte Hernandez, Emanuele Rossi, Sonia Coriani +5 more

Quantum error mitigation (QEM) is essential for extracting chemically accurate results from near-term quantum hardware. Many widely used QEM methods rely on uncontrolled heuristics whose bias depends on the specific circuit and noise realization. In this work, we employ QESEM---a characterization-based, unbiased quasi-probabilistic mitigation method---on IBM's Aachen quantum processor to compute the ground-state potential energy surface (PES) of the symmetrically-stretched water molecule. We consider a classically-optimized, single-layer perfect-pairing tiled unitary product state ansatz. We map this ansatz to an 8-qubit register corresponding to a (4,4) active space and the STO-3G basis set. Compared to the statevector reference, we find that raw QPU results typically overestimate the ground-state energy by around 500~mHa across the scanned geometries. On the other hand, QESEM-mitigated results fall approximately within 100~mHa, 30~mHa, or ``chemical accuracy'' ($\sim$1.5~mHa), depending on the target precision. We benchmark QESEM at both loose (0.1~Ha) and tight (0.01~Ha) precision targets, evaluating both individual and merged batches of runs. As the precision target is tightened, the accuracy improves systematically, matching or exceeding results reported in the literature. We further quantify the sampling cost of these results, reporting the number of shots required at each precision level. Our results show how, with the current levels of hardware error, reaching the highest accuracies demands substantial QPU time. The results demonstrate that the characterization-based, unbiased error mitigation provided by QESEM allows to measure quantitatively meaningful potential energy surfaces on current quantum hardware. Concurrently, they highlight the sampling overhead associated with QEM, which remains a central bottleneck en route to larger chemical problems and higher precision.

quant-pharXiv:2609.07284•Sep 8, 2026•0 citations

Benchmarking Quantum Processor Performance at Scale

David C. McKay, Ian Hincks, Emily Pritchett +3 more

As quantum processors grow, new performance benchmarks are required to capture the full quality of the devices at scale. While quantum volume is an excellent benchmark, it focuses on the highest quality subset of the device and so is unable to indicate the average performance over a large number of connected qubits. Furthermore, it is a discrete pass/fail and so is not reflective of continuous improvements in hardware nor does it provide quantitative direction to large-scale algorithms. For example, there may be value in error mitigated Hamiltonian simulation at scale with devices unable to pass strict quantum volume tests. Here we discuss a scalable benchmark which measures the fidelity of a connecting set of two-qubit gates over $N$ qubits by measuring gate errors using simultaneous direct randomized benchmarking in disjoint layers. Our layer fidelity can be easily related to algorithmic run time, via $γ$ defined in Ref.\cite{berg2022probabilistic} that can be used to estimate the number of circuits required for error mitigation. The protocol is efficient and obtains all the pair rates in the layered structure. Compared to regular (isolated) RB this approach is sensitive to crosstalk. As an example we measure a $N=80~(100)$ qubit layer fidelity on a 127 qubit fixed-coupling "Eagle" processor (ibm\_sherbrooke) of 0.26(0.19) and on the 133 qubit tunable-coupling "Heron" processor (ibm\_montecarlo) of 0.61(0.26). This can easily be expressed as a layer size independent quantity, error per layered gate (EPLG), which is here $1.7\times10^{-2}(1.7\times10^{-2})$ for ibm\_sherbrooke and $6.2\times10^{-3}(1.2\times10^{-2})$ for ibm\_montecarlo.

arXiv:2311.05933•Nov 10, 2023•29 citations
Quantum processors have crossed the one-hundred-qubit mark, but noise continues to limit circuit performance, while full quantum error correction remains too costly for routine use. Error suppression and mitigation therefore play an important role in extracting value from current hardware, yet independent comparisons of commercial solutions on identical workloads and devices remain scarce. We benchmark IBM Qiskit Runtime, Q-CTRL Performance Management, and Qedma QESEM on IBM Pittsburgh, a 156-qubit IBM Quantum Heron r3 processor. For Sampler workloads, we run Bernstein-Vazirani, quantum phase estimation, GHZ-state preparation, and randomized mirror circuits with up to 100 measured qubits, comparing raw execution, IBM measurement twirling, and Q-CTRL. For Estimator workloads, we measure chain-averaged magnetization and correlation observables of an eight-layer transverse-field Ising circuit at 25, 50, and 75 qubits against an exact matrix-product-state reference, comparing IBM raw execution, IBM TREX plus twirling, Q-CTRL, and QESEM. Q-CTRL produced the best results on the three structured Sampler workloads while keeping reported QPU times within the same order as the IBM configurations. Across six Ising observable and system-size cases, aggregate mean absolute error was 0.0883 for IBM raw execution, 0.0807 for IBM TREX plus twirling, 0.0285 for Q-CTRL, and 0.0188 for QESEM. Relative to raw execution, Q-CTRL and QESEM reduced aggregate error by factors of 3.10 and 4.70, respectively, while QESEM used 7.5 to 11.1 times the reported QPU time of Q-CTRL. These results show that managed error suppression and mitigation can substantially improve current hardware performance, but with distinct accuracy and execution-time tradeoffs.
Abstract Quantum computing has recently emerged as a novel paradigm for solving problems otherwise intractable on classical computers, yet the practical progress of quantum computers is severely impacted by noise, decoherence, and imperfect gate operations in Noisy Intermediate-Scale Quantum (NISQ) devices. Specific to IBM Quantum hardware, imperfections due to readout error, gate errors, and device drift, which depends on time, resolves limits for the accuracy of outputs from our algorithms. The mitigation strategies currently used, for example, Measurement Error Mitigation (MEM), Zero Noise Extrapolation (ZNE), and Clifford Data Regression (CDR), offer improvement over raw, unmitigated outputs, but they are static and not dynamic; the reduction of noise in within an NISQ device is temporal and can vary in patterns that are non-zero. In addition to this, using the conventional methods provides inconsistent and suboptimal results.This study will provide enhanced reliability with respect to performing quantum computation on IBM Quantum hardware with a unique mitigation framework that is adaptive and computationally efficient for a high-fidelity output. The problem taken on here is the failure of existing error mitigation strategies to provide adaptive noise compensation, as they assume a statically-distributed error, despite the performance-related characteristics already being documented in regards to calibration drift and variation over time.To achieve this, we propose a Hybrid Adaptive Error Mitigation (HAEM) approach that includes baseline measurement error mitigation and an additional correction layer that utilizes realtime calibration information, along with lightweight machine learning models. The approach can be broken down into three steps: (i) perform standard measurement error mitigation to reduce classical readout noise, (ii) execute compact calibration circuits, such as Bell states, GHZ states and Clifford benchmarks to capture then current error profile of the device, and (iii) use a lightweight machine learning model (having been trained on historical and newest calibration data) to dynamically change the mitigation weights applied for the target quantum algorithm. All implementation is done using Qiskit Runtime to ensure low-latency execution, and we completed experiments on both Qiskit Aer noisy simulators and IBM Quantum devices.Initial results suggest HAEM improved the outputs of quantum algorithms' fidelity compared to the unmitigated runs and the baseline measurement error mitigation (MEM) runs. On the noisy simulators, HAEM increased fidelity from a raw performance of 0.65 to 0.87, nearly a 34% improvement. In fairer hardware-like scenarios, fidelity-on-average was persistently 12% better than MEM, with nearly equal time duration for the additional adaptive measurements. The adaptive aspect of HAEM consistently supported subsequent calibration cycles of the device and was effective to continue providing fidelity improvements despite the static mitigation performance degrading.To sum up, the proposed HAEM framework is a modern and viable alternative for error mitigation which brings together the benefits of baseline approaches with corrections that are driven by fixed-function error-corrective, adaptive learning. As both learning-based and standard baseline approaches can only achieve fixed levels of performance, HAEM, through its use of noise mitigation both at execution time and through correlating it with standard data, provides a route towards reliable quantum computations on current IBM hardware. HAEM also presents a contribution to the NISQ error-resilient landscape, and however it is intended that it will continue to improve future applications of hybrid workflows of quantum and classical computation where error mitigation and resilience is important.
We experimentally study error mitigation and finite-shot sampling on superconducting quantum hardware under a constrained execution budget. The study combines calibration-aware qubit selection, circuit-depth scaling, zero-noise extrapolation, dynamical decoupling, readout-error mitigation, and repeated-shot estimation on an IBM Quantum processor. Experiments are organized across ideal simulation, noise-model simulation, and physical-device execution to separate sampling uncertainty from device-induced error. We investigate how mitigation performance changes with circuit depth, effective noise scale, qubit connectivity, and measurement budget, and quantify accuracy using expectation-value error, mean-squared error, statistical uncertainty, and mitigation gain. A fixed hardware-execution budget is used to evaluate shot allocation strategies and repeated measurements without relying on unlimited sampling. The resulting analysis provides a hardware-aware characterization of when mitigation improves expectation-value estimation and when finite-shot fluctuations offset the benefit of additional mitigation overhead. The implementation uses contemporary Qiskit and IBM Quantum Runtime workflows and is designed to provide reproducible experimental evidence for error-mitigation studies on current quantum processors.
Error mitigation is essential for unlocking the full potential of quantum algorithms and accelerating the timeline toward quantum advantage. As quantum hardware progresses to push the boundaries of classical simulation, efficient and robust error mitigation methods are becoming increasingly important for producing accurate and reliable outputs. However, existing error-mitigation approaches face a fundamental tradeoff between practical performance and reliability: heuristic methods such as zero-noise extrapolation (ZNE) enjoy faster runtime but lack accuracy guarantees, while rigorous techniques such as probabilistic error cancellation (PEC) provide unbiased estimates at prohibitive computational cost. We introduce a characterization-based, rigorously-grounded quantum error mitigation and error suppression framework (QESEM) that resolves this tradeoff by leveraging the accuracy guarantees of quasi-probabilistic mitigation with dramatically reduced overhead. We explain the innovative methods underlying QESEM and demonstrate its capabilities in the largest utility-scale error mitigation experiment based on an unbiased method. This experiment simulates the kicked transverse field Ising model with far-from-Clifford parameters on an IBM Heron device. We further validate QESEM's versatility across arbitrary quantum circuits and devices through high-accuracy error-mitigated molecular VQE circuits executed on IBM Heron and IonQ trapped-ion devices. Compared with multiple variants of the widely used zero-noise extrapolation method, QESEM consistently achieves higher accuracy while avoiding the prohibitive runtime overhead associated with PEC. These results mark a significant step forward in accuracy and reliability for running quantum circuits on current devices across diverse applications. Finally, we provide projections of QESEM's performance on near-term devices toward quantum advantage.
Readout errors are one of the dominant sources of noise in current quantum processors, limiting both expectation-value estimation and sampling-based applications. Since they affect only the classical measurement outcomes, they can be addressed using classical coding techniques: immediately before measurement, each data qubit is redundantly encoded with ancilla qubits, and the resulting bit string is decoded either by post-selection or by majority voting. Unlike conventional readout error mitigation, which corrects only aggregate quantities such as expectation values, this approach operates on individual measurement shots and can therefore produce approximately corrected samples. We present a systematic cross-platform and cross-generation experimental evaluation of repetition-code readout error detection and correction. We benchmark the same protocol on IBM Heron r1-r3 superconducting processors and Quantinuum H1 and H2 trapped-ion processors while independently varying the code distance, hardware generation, and encoding layout. We find that both error detection and correction improve readout fidelity on every device and generation tested, even as the unencoded baseline improves substantially across successive hardware releases. At the same time, the value of additional redundancy depends strongly on the underlying hardware. On superconducting processors, the extra gate errors introduced by the encoding rapidly offset its benefits, whereas on trapped-ion processors the much lower gate error rates allow larger code distances to remain advantageous.
Quantum error mitigation (QEM) is essential for extracting chemically accurate results from near-term quantum hardware. Many widely used QEM methods rely on uncontrolled heuristics whose bias depends on the specific circuit and noise realization. In this work, we employ QESEM---a characterization-based, unbiased quasi-probabilistic mitigation method---on IBM's Aachen quantum processor to compute the ground-state potential energy surface (PES) of the symmetrically-stretched water molecule. We consider a classically-optimized, single-layer perfect-pairing tiled unitary product state ansatz. We map this ansatz to an 8-qubit register corresponding to a (4,4) active space and the STO-3G basis set. Compared to the statevector reference, we find that raw QPU results typically overestimate the ground-state energy by around 500~mHa across the scanned geometries. On the other hand, QESEM-mitigated results fall approximately within 100~mHa, 30~mHa, or ``chemical accuracy'' ($\sim$1.5~mHa), depending on the target precision. We benchmark QESEM at both loose (0.1~Ha) and tight (0.01~Ha) precision targets, evaluating both individual and merged batches of runs. As the precision target is tightened, the accuracy improves systematically, matching or exceeding results reported in the literature. We further quantify the sampling cost of these results, reporting the number of shots required at each precision level. Our results show how, with the current levels of hardware error, reaching the highest accuracies demands substantial QPU time. The results demonstrate that the characterization-based, unbiased error mitigation provided by QESEM allows to measure quantitatively meaningful potential energy surfaces on current quantum hardware. Concurrently, they highlight the sampling overhead associated with QEM, which remains a central bottleneck en route to larger chemical problems and higher precision.
As quantum processors grow, new performance benchmarks are required to capture the full quality of the devices at scale. While quantum volume is an excellent benchmark, it focuses on the highest quality subset of the device and so is unable to indicate the average performance over a large number of connected qubits. Furthermore, it is a discrete pass/fail and so is not reflective of continuous improvements in hardware nor does it provide quantitative direction to large-scale algorithms. For example, there may be value in error mitigated Hamiltonian simulation at scale with devices unable to pass strict quantum volume tests. Here we discuss a scalable benchmark which measures the fidelity of a connecting set of two-qubit gates over NNN qubits by measuring gate errors using simultaneous direct randomized benchmarking in disjoint layers. Our layer fidelity can be easily related to algorithmic run time, via γγγ defined in Ref.\cite{berg2022probabilistic} that can be used to estimate the number of circuits required for error mitigation. The protocol is efficient and obtains all the pair rates in the layered structure. Compared to regular (isolated) RB this approach is sensitive to crosstalk. As an example we measure a N=80 (100)N=80~(100)N=80 (100) qubit layer fidelity on a 127 qubit fixed-coupling "Eagle" processor (ibm\_sherbrooke) of 0.26(0.19) and on the 133 qubit tunable-coupling "Heron" processor (ibm\_montecarlo) of 0.61(0.26). This can easily be expressed as a layer size independent quantity, error per layered gate (EPLG), which is here 1.7×10−2(1.7×10−2)1.7\times10^{-2}(1.7\times10^{-2})1.7×10−2(1.7×10−2) for ibm\_sherbrooke and 6.2×10−3(1.2×10−2)6.2\times10^{-3}(1.2\times10^{-2})6.2×10−3(1.2×10−2) for ibm\_montecarlo.