Quantum Transfer Level (QTL) is applied as a contract-first design and verification framework to the Willow surface-code memory. This manuscript reports a milestone rather than a completed physical optimization and makes a central distinction between hardware width and future-distinguishable boundary-record width. Under the frozen logical-X and logical-Z eigenstate functional contract, initialization and cycle-boundary transformations reduce exactly, ideal data-qubit leakage removal closes side-locally, repeated ideal syndrome cycles collapse to one quantum extraction followed by classical repetitions, and the complete future response is a sparse affine transition family. After the first ideal extraction, no branch-dependent coherent record is required; the full ideal benchmark is generated by parity and exclusive OR (XOR) logic with 48 fresh unbiased bits. Separately, a fixed-basis stabilizer theorem gives a raw distance-seven Pauli-frame boundary record of 48 syndrome coordinates plus one logical-flip coordinate, with a one-bit conditioned residual only when the exact syndrome is already past context. A structural stochastic-fault extension yields conditioned weighted-history partitions, a binary group algebra, and Walsh-character attenuation. In the canonical code-capacity data-Pauli model, the logical-difference distance equals the code distance and the minimum branch-competition barrier is (d + 1)/2; this statement is not promoted to circuit-level superconducting-inspired 1000-ns (SI1000) noise, where hook and correlated mechanisms can reduce effective fault distance. A published distance-three/distance-five constant-Λ extrapolation agrees with the published distance-seven mean at the percent level, as expected from standard below-threshold scaling, and is reported only as a consistency check. At the milestone boundary, exactclosure-complete SI1000 cut certification and the remaining physical QTL optimization remained open.
Quantum Transfer Level (QTL) is applied as a contract-first design and verification framework to the Willow surface-code memory. This manuscript reports a milestone rather than a completed physical optimization and makes a central distinction between hardware width and future-distinguishable boundary-record width. Under the frozen logical-X and logical-Z eigenstate functional contract, initialization and cycle-boundary transformations reduce exactly, ideal data-qubit leakage removal closes side-locally, repeated ideal syndrome cycles collapse to one quantum extraction followed by classical repetitions, and the complete future response is a sparse affine transition family. After the first ideal extraction, no branch-dependent coherent record is required; the full ideal benchmark is generated by parity and exclusive OR (XOR) logic with 48 fresh unbiased bits. Separately, a fixed-basis stabilizer theorem gives a raw distance-seven Pauli-frame boundary record of 48 syndrome coordinates plus one logical-flip coordinate, with a one-bit conditioned residual only when the exact syndrome is already past context. A structural stochastic-fault extension yields conditioned weighted-history partitions, a binary group algebra, and Walsh-character attenuation. In the canonical code-capacity data-Pauli model, the logical-difference distance equals the code distance and the minimum branch-competition barrier is (d + 1)/2; this statement is not promoted to circuit-level superconducting-inspired 1000-ns (SI1000) noise, where hook and correlated mechanisms can reduce effective fault distance. A published distance-three/distance-five constant-Λ extrapolation agrees with the published distance-seven mean at the percent level, as expected from standard below-threshold scaling, and is reported only as a consistency check. At the milestone boundary, exactclosure-complete SI1000 cut certification and the remaining physical QTL optimization remained open.
A second milestone is reported in the Quantum Transfer Level (QTL) optimization of the released Google Willow superconducting-inspired 1000-ns-round (SI1000) surface-code circuits. The certified starting point is the earlier released-instance binary relation-factor reduction on six ten-round logical-X/logical-Z circuits at distances 3, 5, and 7. The continuation closes the multi-signature categorical layer, whose 3-, 7-, and 15-element nonidentity supports follow from linear binary Galois-field GF(2) images of depolarizing Pauli alternatives, and reduces central categorical populations from 564–3666 factors to 112–809 maximal-support factors. Exact future transport exposes a stationary repeated-cycle relation fragment with external widths 9, 25, 49 = d^2, while stochastic mechanism populations reduce to 32, 104, and 216 canonical factors per cycle. Parent reoptimization gives 20, 72, and 156 runtime parents and reveals 31 global stochastic templates, a Walsh-character algebra, sparse subgroup profiles, motifs, functional selector laws, and character programs. The four Walsh attenuation generators are identified with SI1000 channel classes fixed by the published p = 10^−3 rate structure; under fixed SI1000 ratios the residual stochastic law is parameterized by the single base p. Geometry-causal continuation reconstructs all 3416 active source-channel responses from supplied lattice and schedule data, including 2104 distance-7 channels used for schedule-reconstruction verification, and contracts the stored response rulebook from 790 to 40 bits under the declared cost grammar. Canonical gauge removes the 15,372-bit selector/embedding overlay while preserving all 496 parent probability mass functions exactly. These are contract-description metrics, not hardware descriptions; runtime parent count and 9/25/49 relation interfaces remain unchanged.
Quantum Transfer Level (QTL) optimization is continued from a certified class-level handoff into released Google Willow superconducting-inspired 1000-ns-round (SI1000) surface-code circuits. The post-handoff objective is an instance-level relation reduction followed by cross-distance and cross-basis testing. The initial target is distance-3 logical-X r10. At each physical cut, emitted detector rows A and a minimal future basis C are retained jointly. Because rowspan[A; C] = rowspan[A; Bd; Bo],equality of [A; C] signatures is exactly equivalent to equality of full detector-plus-logical signatures; the equivalence classes therefore coincide with those of a circuit-derived detector error model. A legal pair with probabilities 0.002 and 0.005 is fused to 0.00698, and direct detector-record incidence independently confirms the shared physical signature. Across all 54 inter-cycle cuts at distances 3, 5, and 7 in both logical bases, the raw conditional quotient is d^2 = (d^2 − 1) + 1, so the one-bit SI1000promotion criterion of the companion analysis fails under the released source-level contract. Under a declared source-channel-preserving factorization, exact binary crossing reduction ranges from 78.24% to 82.81% over all cuts (79.49%–82.81% for repeated-cycle cuts 2–9). Factorization-independent distinct nonzero full detector-plus-logical signatures are also reported. An exact Pauli-refactorization audit confirms that depolarizing channels admit independent binary decompositions, while the source-channel-preserving form is retained as the input to subsequent native lowering. No reduction of hardware qubits, native gates, cycle time, leakage resources, or measured logical-error rate is claimed.
Future-observable equivalence is tested across released Willow surface-code memories at distances d = 3, 5, 7. The principle states that a computation need retain only distinctions that its declared future can still observe. Three consequences are examined. First, exhaustive propagation of every physical single-fault alternative in the released superconducting-inspired SI1000 circuit-noise models finds no detector history with opposite terminal logical meanings and no zero-syndrome single faultthat flips the answer, across 9,089, 25,840, and 53,038 alternatives at distances 3, 5, and 7. Second, an exhaustive released-circuit data-error slice probes the first weight beyond the guaranteed correction radius. All protected layers decode without failure; at weights 2, 3, and 4, exact logical-class weighting fails on 18/36, 292/2300, and 4606/211876 subsets, respectively. Plain minimum-weight matching fails on exactly the same subsets, each paired with an opposite-logical lower-weight history on a minimum-weight logical operator. Third, the optimized distance-three decision architecture is transferred directly to distance five and seven without rediscovering intermediate synthesis stages. The same bounded local stochastic primitive remains sufficient: runtime parent counts are 20, 72, and 156, while maximum local parent width remains six and maximum atom count remains 16. The transferred sparse key/value record has structural footprint B(d, K) = K[(d^2 − 1) + 9] = K(d^2 + 8) bits for retained-record capacity K, rather than scaling with the 2^(d^2−1) raw relation-key space. For the inherited nominal K = 8 instance, the corresponding footprints are 136, 264, and 456 bits at d = 3, 5, 7; whether eight entries retain full circuit-noise accuracy at d = 5 or d = 7 remains an open benchmark. No global state vector or dense exponential decision table is constructed
Future-Observable Error Correction (FOEC) treats error correction as preservation of the distinctions about the past that a declared future can still observe. A distance-three Willow surface-code extraction circuit is extended here by a constructed single-logical-qubit Clifford contract. The released extraction body is retained, detector information is internalized as local relations, and probability over the logical Pauli frame is represented by three nontrivial logical-Walsh character fields rather than by a per-round physical correction. Twenty certified bounded parents attach the relation boundary to those fields. All 24 projective single-qubit Clifford elements reduce to six exact frame actions and act only by permutation of the three fields, with zero mismatch over 288 four-sector coordinate checks. The identity continuation reproduces a frozen 40,000-record exact closed-formula benchmark with zero decision mismatches and the same 197 logical failures. Scored point-of-use validation uses only truth-bearing logical-X and logical-Z memory records; therefore those scored tests consume one frame bit at a time and do not directly score the joint x–z character. Across twelve frame-action/truth-basis classes and 49,152 representative records, the FOEC lane path and an independently reconstructed two-sector maximum-likelihood reference give zero decision mismatches and identical failure sets. Exact character algebra gives K = G0 − G1, so the exact logical-Walsh and two-sector functionals coincide for every detector history in the frozen models; numerical residuals of 1.94 × 10^−14 and 1.12 × 10^−14 audit the independent implementations rather than supply the proof. Negative controls detect both corrupted relation wiring and omitted Clifford-frame propagation. The result establishes a complete error-correction path for the constructed frame-level continuing-Clifford contract, not a source-authentic noisy logical-gate experiment or a scored joint-frame readout.
A controller-integrated realization is reported for an exact closed-formula maximum-likelihood decoder acting on the released distance-three, logical-X, ten-round Willow surface-code memory-readout circuit. A newly frozen same-shot benchmark of 40,000 Stim-generated shots (seed 20260929) gives 197 logical failures for exact arithmetic, 218 for belief propagation plus ordered-statistics decoding, 245 for correlated matching, and 290 for plain minimum-weight perfect matching. Quantum Transfer Level (QTL) is used as a proprietary black-box framework to integrate the decoder while preserving the quantum schedule. The architecture contains the unchanged quantum memory circuit, a 91-exclusive-OR detector/relation shell, and a nonlinear decision cell. The shell carries an eight-bit measurement record through the repeated-round region, four bits near terminal readout, and zero after terminal consumption; these widths do not bound decoder state. Historical bounded-arithmetic measurements from the original realization run report a 9-bit minifloat decision cell with an eight-entry, 136-bit carried record, 25,124 coefficients before sharing, 7,646 after seven bulk banks were verified identical at the time, a maximum workload of 373 multiply-accumulate operations in one cycle, and doubled-noise counts of 313, 292, and 286 failures for retained-record capacities 8, 16, and 32. The final minifloat executable and coefficient-bank data were not preserved, so these values are not independently reproduced by the current public release. Integration adds no quantum operation or SI1000 noise site. The 9,089 physical single-fault alternatives induce 1,005 distinct detector-error-model mechanisms; exact arithmetic decodes all mechanisms correctly, while the original bounded-arithmetic run reported the same zero-failure result for minifloat arithmetic. The result is zero-quantum-overhead integration of a bounded classical decoder, not elimination of the decoder itself.
Quantum error correction can suppress logical errors exponentially with code distance when physical noise is below threshold. Realizing this on hardware requires tight coordination among quantum gates, mid-circuit measurements, and qubit coherence. Device variation, noise asymmetry, and correlations across space and time complicate the translation of these capabilities into logical error suppression. Here, we study rotated surface-code memory on an IBM Nighthawk r2 processor. Performance varies across tested processor placements, which we attribute to differences in qubit quality. We optimize the code by combining short readout, fused measurement and reset, and an XX echo on data qubits during ancilla readout. Compared with standard readout without reset or echo, the optimized syndrome extraction circuit reduces the median per-round logical error rate by factors of 3.8 in the X basis and 1.4 in the Z basis. In memory experiments of up to 150 rounds, the distance advantage weakens, alongside long-lived correlations that may reflect a persistent error component. Under our optimization recipe, increasing the protected distance from 3 to 6 while holding the other distance fixed reduces the per-round logical error rate from 0.53% to 0.24% in Z memory and from 0.52% to 0.22% in X memory. The corresponding error-suppression factors under maximum-likelihood decoding are 1.68 and 1.85. These results connect circuit compilation and optimization to surface-code memory performance and limitations, and motivate QPU and QEC circuit codesign for fault-tolerant quantum computing primitives on current cloud hardware.