The public 53-qubit, 20-cycle Google Sycamore random-circuit-sampling workload is used to test whether source-wire count must equal peak coherent physical width when the external contract is the fixed |0>^53 preparation and the complete 53-bit computational-basis sampling distribution. Quantum Transfer Level (QTL) design separates the external contract, causal transition structure, fused parent representation, and physical lowering. The frozen 3263-operation source is normalized exactly to 430 dressed two-coordinate parents. A certified fusion topology then reduces the design object to a 20-parent STATIC24 abstraction with 24 work roles, 29 terminal relation roles, maximum source bag size eight, maximum separator size five, and no unresolved active surplus-field crossing. Physical lowering uses future-canonical relational closure (FCRC): the crossing object at a legal boundary is the complete future-canonical row-isometry record Qc with inherited gauge, not source-wire count, separator width, or rank alone. Exact cut advancement closes the left boundary through parent P08 and the right boundary through parent P12, producing two five-axis inherited records. The inherited-global P13–P19 root is then a 4096 × 256 isometry generated by 60 root-owned two-coordinate factors. The final fixed-register realization uses 24 physical slots but has coherent-width profile 22 → 15 → 11 → 14 → 17 → 19 → 12, giving a peak of 22 coherent qubits and zero extra persistent quantum qubits. The program emits all 53 terminal labels exactly once, partitions all 430 factor instances as 190 + 180 + 60, and requires no feed-forward control or runtime branch selection. The final-assembly report records compatibility with the frozen terminal instrument under the upstream certificate semantics; the exact full-distribution statement DTV = 0 remains anchored to the analytical canonical conditional-state proof in the main manuscript. Floating-point reconstruction and completeness diagnostics remain at approximately 10^−14–10^−16 and are reported separately from the exact algebraic claim. Active rectangular Stinespring/isometry columns for the two large leaves have been materialized without dense square completion; hardware-native one- and two-qubit decomposition, routing, pulse scheduling, noise performance, and wall-clock runtime remain downstream engineering tasks. The scoped public evidence package accompanying this document contains a topology-only witness, an independent topology re-verification, selected left/right numerical certificates, a rectangular-emission report, and a final-assembly report. It is not presented as the complete historical certificate chain or as a numerical-regeneration payload for every reported residual.
The public 53-qubit, 20-cycle Google Sycamore random-circuit-sampling workload is used to test whether source-wire count must equal peak coherent physical width when the external contract is the fixed |0>^53 preparation and the complete 53-bit computational-basis sampling distribution. Quantum Transfer Level (QTL) design separates the external contract, causal transition structure, fused parent representation, and physical lowering. The frozen 3263-operation source is normalized exactly to 430 dressed two-coordinate parents. A certified fusion topology then reduces the design object to a 20-parent STATIC24 abstraction with 24 work roles, 29 terminal relation roles, maximum source bag size eight, maximum separator size five, and no unresolved active surplus-field crossing. Physical lowering uses future-canonical relational closure (FCRC): the crossing object at a legal boundary is the complete future-canonical row-isometry record Qc with inherited gauge, not source-wire count, separator width, or rank alone. Exact cut advancement closes the left boundary through parent P08 and the right boundary through parent P12, producing two five-axis inherited records. The inherited-global P13–P19 root is then a 4096 × 256 isometry generated by 60 root-owned two-coordinate factors. The final fixed-register realization uses 24 physical slots but has coherent-width profile 22 → 15 → 11 → 14 → 17 → 19 → 12, giving a peak of 22 coherent qubits and zero extra persistent quantum qubits. The program emits all 53 terminal labels exactly once, partitions all 430 factor instances as 190 + 180 + 60, and requires no feed-forward control or runtime branch selection. The final-assembly report records compatibility with the frozen terminal instrument under the upstream certificate semantics; the exact full-distribution statement DTV = 0 remains anchored to the analytical canonical conditional-state proof in the main manuscript. Floating-point reconstruction and completeness diagnostics remain at approximately 10^−14–10^−16 and are reported separately from the exact algebraic claim. Active rectangular Stinespring/isometry columns for the two large leaves have been materialized without dense square completion; hardware-native one- and two-qubit decomposition, routing, pulse scheduling, noise performance, and wall-clock runtime remain downstream engineering tasks. The scoped public evidence package accompanying this document contains a topology-only witness, an independent topology re-verification, selected left/right numerical certificates, a rectangular-emission report, and a final-assembly report. It is not presented as the complete historical certificate chain or as a numerical-regeneration payload for every reported residual.
The public 53-qubit, 20-cycle Google Sycamore random-circuit-sampling workload is used to test whether physical quantum width can be reduced when the frozen preparation and complete computational-basis sampling distribution, rather than the source wire diagram, define the external contract. The analysis is performed at the Quantum Transfer Level (QTL). Exact normalization maps the 3263-operation source to 430 dressed two-coordinate parents, while legal retiming gives an exact 53 → 52 live-qubit baseline. The active interaction graph has a 24-vertex cover, while its first interaction layer contains a matching of 24 disjoint edges; weak matching–cover dualitytherefore fixes 24 as the minimum interaction-separating frontier width. Compose-first temporal transfers on that frontier exhibit geometric suppression of their transverse defect with repetition depth, reaching the 10^−16 scale at the five repetitions of the frozen schedule. The final lowering changes parent class rather than forcing the transverse transfers to be unitary. One frontier output is emitted before the first instrument, freeing its physical carrier; the remaining 23 conditional-state carriers retain the frontier record and the released carrier is reused as a Stinespring meter. The peak width therefore remains 24 rather than increasing to 25. Recursive deterministic instruments emit the complementary outputs and leave the exact conditional state of the final 23 bits, proving equality of the complete 53-bit sampling distribution and hence DTV = 0 in exact arithmetic. Generic conditional-state preparation and instrument synthesis may remain exponentially expensive, so the result is a physical-width result rather than an efficiency claim.
The public 53-qubit, 20-cycle Google Sycamore random-circuit-sampling workload is used to test whether nominal circuit width equals the simultaneous coherent-memory requirement when the fixed preparation and complete 53-bit computational-basis sampling distribution define the external contract. Exact normalization maps the 3263-operation source to 430 dressed two-coordinate parents. Structural analysis exposes a 24-thread interaction frontier, and canonical conditional-state instruments provide an exact dynamic realization on a 24-slot physical register while preserving the complete 53-bit sampling distribution with DTV = 0 in exact arithmetic. A downstream lifetime-aware lowering of the same dynamic contract refines the live coherent-width profile to 22 → 15 → 11 → 14 → 17 → 19 → 12, with 41 mid-circuit terminal measurements and unconditional resets, no feed-forward, and no runtime branch selection. The resulting peak simultaneous coherent width is therefore 22 even though the source representation contains 53 qubit worldlines and the physical register contains 24 reusable slots. This is not a gate-count or runtime optimization: generic exact synthesis of the large rectangular blocks can require on the order of 10^8 elementary two-level operations. The result is instead a constructive separation of nominal circuitwidth, physical slot count, peak coherent width, measurement/reset cost, and synthesis complexity.
Quantum Transfer Level (QTL) is applied as a contract-first design and verification framework to the Willow surface-code memory. This manuscript reports a milestone rather than a completed physical optimization and makes a central distinction between hardware width and future-distinguishable boundary-record width. Under the frozen logical-X and logical-Z eigenstate functional contract, initialization and cycle-boundary transformations reduce exactly, ideal data-qubit leakage removal closes side-locally, repeated ideal syndrome cycles collapse to one quantum extraction followed by classical repetitions, and the complete future response is a sparse affine transition family. After the first ideal extraction, no branch-dependent coherent record is required; the full ideal benchmark is generated by parity and exclusive OR (XOR) logic with 48 fresh unbiased bits. Separately, a fixed-basis stabilizer theorem gives a raw distance-seven Pauli-frame boundary record of 48 syndrome coordinates plus one logical-flip coordinate, with a one-bit conditioned residual only when the exact syndrome is already past context. A structural stochastic-fault extension yields conditioned weighted-history partitions, a binary group algebra, and Walsh-character attenuation. In the canonical code-capacity data-Pauli model, the logical-difference distance equals the code distance and the minimum branch-competition barrier is (d + 1)/2; this statement is not promoted to circuit-level superconducting-inspired 1000-ns (SI1000) noise, where hook and correlated mechanisms can reduce effective fault distance. A published distance-three/distance-five constant-Λ extrapolation agrees with the published distance-seven mean at the percent level, as expected from standard below-threshold scaling, and is reported only as a consistency check. At the milestone boundary, exactclosure-complete SI1000 cut certification and the remaining physical QTL optimization remained open.
A Quantum Transfer Level (QTL) design and verification framework is applied to seven public quantum-computing workloads in a fully automated two-iteration pipeline. The first pass emits optimized parent contracts; the second consumes those emitted contracts directly as its new inputs. Optimization typically completes in minutes per benchmark on the development machine, excluding independent certification sweeps. First-pass results are retained: QPE gives 7 → 3 controlled phases; the HRS multiplier gives a 63.3% CNOT-equivalent proxy reduction at n = 64; exact-grid HHL becomes a two-qubit parent; generic degree-601 QSVT retains all 601 signal queries while a structured 2 × 2 instance becomes a two-qubit parent; Sycamore gives 3263 → 430 dressed parents; G81 becomes 40,000 exact 18-qubit edge evaluators; and the IBM/Nature Ising workload gives 5420 → 3178 → 1511 → 20 across distinct representation levels. In the second iteration, QPE, exact-grid HHL, and structured QSVT become one instruction only by definition of their declared parent interfaces, whereas generic QSVT remains at 601 queries. Sycamore requires 430/430 numerical syntheses: XI, Y I, IX, IY, (XX + Y Y )/2 close on su(4), so absorption of the 1113 one-qubit pulses gives 1543 → 430 control instructions with full-output DTV ≤ 1.92022 × 10^−11 under a redesigned interface, not existing Google firmware. G81 collapses 40,000 → 88 exact gauge/reflection classes; at declared p = 2 angles, the 88-class weighted objective 5713.216637468534 matches a direct 40,000-edge local evaluation within 4.82 × 10^−10. IBM gives 3178 → 1511 bounded parent-native patch instructions. No physical-hardware execution is reported.
A second milestone is reported in the Quantum Transfer Level (QTL) optimization of the released Google Willow superconducting-inspired 1000-ns-round (SI1000) surface-code circuits. The certified starting point is the earlier released-instance binary relation-factor reduction on six ten-round logical-X/logical-Z circuits at distances 3, 5, and 7. The continuation closes the multi-signature categorical layer, whose 3-, 7-, and 15-element nonidentity supports follow from linear binary Galois-field GF(2) images of depolarizing Pauli alternatives, and reduces central categorical populations from 564–3666 factors to 112–809 maximal-support factors. Exact future transport exposes a stationary repeated-cycle relation fragment with external widths 9, 25, 49 = d^2, while stochastic mechanism populations reduce to 32, 104, and 216 canonical factors per cycle. Parent reoptimization gives 20, 72, and 156 runtime parents and reveals 31 global stochastic templates, a Walsh-character algebra, sparse subgroup profiles, motifs, functional selector laws, and character programs. The four Walsh attenuation generators are identified with SI1000 channel classes fixed by the published p = 10^−3 rate structure; under fixed SI1000 ratios the residual stochastic law is parameterized by the single base p. Geometry-causal continuation reconstructs all 3416 active source-channel responses from supplied lattice and schedule data, including 2104 distance-7 channels used for schedule-reconstruction verification, and contracts the stored response rulebook from 790 to 40 bits under the declared cost grammar. Canonical gauge removes the 15,372-bit selector/embedding overlay while preserving all 496 parent probability mass functions exactly. These are contract-description metrics, not hardware descriptions; runtime parent count and 9/25/49 relation interfaces remain unchanged.
Quantum Transfer Level (QTL) optimization is continued from a certified class-level handoff into released Google Willow superconducting-inspired 1000-ns-round (SI1000) surface-code circuits. The post-handoff objective is an instance-level relation reduction followed by cross-distance and cross-basis testing. The initial target is distance-3 logical-X r10. At each physical cut, emitted detector rows A and a minimal future basis C are retained jointly. Because rowspan[A; C] = rowspan[A; Bd; Bo],equality of [A; C] signatures is exactly equivalent to equality of full detector-plus-logical signatures; the equivalence classes therefore coincide with those of a circuit-derived detector error model. A legal pair with probabilities 0.002 and 0.005 is fused to 0.00698, and direct detector-record incidence independently confirms the shared physical signature. Across all 54 inter-cycle cuts at distances 3, 5, and 7 in both logical bases, the raw conditional quotient is d^2 = (d^2 − 1) + 1, so the one-bit SI1000promotion criterion of the companion analysis fails under the released source-level contract. Under a declared source-channel-preserving factorization, exact binary crossing reduction ranges from 78.24% to 82.81% over all cuts (79.49%–82.81% for repeated-cycle cuts 2–9). Factorization-independent distinct nonzero full detector-plus-logical signatures are also reported. An exact Pauli-refactorization audit confirms that depolarizing channels admit independent binary decompositions, while the source-channel-preserving form is retained as the input to subsequent native lowering. No reduction of hardware qubits, native gates, cycle time, leakage resources, or measured logical-error rate is claimed.