ABSTRACT: Recent research has tackled the problem of mitigating noise present in quantum computers in the Noisy Intermediate-Scale Quantum (NISQ) era to enable precise computations and to benefit from the intrinsic properties of quantum mechanics. For this matter, an important task is the characterization of qubits available in quantum devices so as to provide insights on how to reduce noise on the final output of a quantum circuit. Characterization comprises analysis of noise sources and this information can be used to reduce noise with methods such as Cycle Benchmarking, Quantum Error Mitigation, Quantum Error Correction and others. Here, we study optimization of pulses through Quantum Optimal Control (QOC) to obtain higher gate fidelity. We will explore an algorithm that performs calibration on specific quantum gates by implementing optimized pulse schedules to subsequently use the algorithm for analysis of noise sources. Using calibrated gates as input, several benchmarking protocols, including pulse noise extrapolation, leakage analysis from quantum optimal control, and machine learning based classification of qubit readout, will be tested to extract precise information on how noise influences the analyzed qubits. We will explain and discuss different techniques for obtaining properties of qubits and quantum computers. We will implement state discrimination with a Machine Learning (ML) focus to analyze readout errors caused by factors such as cross-talk and leakage into higher quantum states. We will perform noise fitting of optimized pulses and evaluate the effectiveness of important quantum algorithms at the pulse level.
ABSTRACT: Recent research has tackled the problem of mitigating noise present in quantum computers in the Noisy Intermediate-Scale Quantum (NISQ) era to enable precise computations and to benefit from the intrinsic properties of quantum mechanics. For this matter, an important task is the characterization of qubits available in quantum devices so as to provide insights on how to reduce noise on the final output of a quantum circuit. Characterization comprises analysis of noise sources and this information can be used to reduce noise with methods such as Cycle Benchmarking, Quantum Error Mitigation, Quantum Error Correction and others. Here, we study optimization of pulses through Quantum Optimal Control (QOC) to obtain higher gate fidelity. We will explore an algorithm that performs calibration on specific quantum gates by implementing optimized pulse schedules to subsequently use the algorithm for analysis of noise sources. Using calibrated gates as input, several benchmarking protocols, including pulse noise extrapolation, leakage analysis from quantum optimal control, and machine learning based classification of qubit readout, will be tested to extract precise information on how noise influences the analyzed qubits. We will explain and discuss different techniques for obtaining properties of qubits and quantum computers. We will implement state discrimination with a Machine Learning (ML) focus to analyze readout errors caused by factors such as cross-talk and leakage into higher quantum states. We will perform noise fitting of optimized pulses and evaluate the effectiveness of important quantum algorithms at the pulse level.
Noise in current quantum hardware (NISQ devices) poses a major obstacle by degrading gate operations and overall circuit fidelity toward FTQC. Traditional quantum error correction (QEC) is effective but resource-intensive, requiring several extra qubits and operations beyond the reach of near-term devices. Quantum error mitigation (QEM) offers a complementary path by reducing the impact of error prior to full correction. We present an adaptive pulse-level QEM using genetic algorithms to dynamically adjust control pulses in real-time, improving algorithm fidelity without modifying the logic structure of a quantum circuit. By targeting pulse parameters directly, this method reduces the impact of various noise sources, improving algorithm resilience in quantum circuits. To demonstrate the effectiveness of our methodology, we apply our protocol to five key quantum algorithms, including Bernstein-Vazirani, DeutschJozsa, Grover's search, Quantum Fourier Transform (QFT), and its inverse (IQFT). Experimental results show that our pulse-level optimization strategy provides a flexible and efficient solution for increasing fidelity during the noisy execution of quantum circuits. Our work contributes to advance error mitigation techniques, essential for robust quantum computing, which will increasingly require HPC infrastructure as quantum systems scale.
Quantum devices in the noisy intermediate-scale quantum (NISQ) era are highly susceptible to different types of quantum noise, which directly impact the reliability of experimental results. This work provides a characterization of error behavior arising from quantum noises on IBM's superconducting quantum processor, offering practical insights for algorithm design, benchmarking, and error-mitigation strategies on a real superconducting quantum processor in the NISQ era. The study begins with the measurement of the basis state, without applying any gate, to quantify state-preparation and measurement (SPAM) errors. Additionally, the errors are further quantified due to the application of single-qubit Pauli-X, two-qubit CNOT gate and other multi-qubit Controlled-X gates. Each circuit was executed with 1024 shots, and the percentage error between the expected and observed outputs was computed. The results show that the single-qubit Pauli-X gate exhibits relatively low errors in comparison with the two-qubit CNOT gate, whereas other multi-qubit Controlled-X gates lead to significantly higher deviations. This work also analyzes the noise effect of a fourqubit Controlled-X gate being implemented using a three-qubit Controlled-X gate with an extra auxiliary qubit, and the result shows a significant reduction in the error rate.
The rapid advancement of Noisy Intermediate-Scale Quantum (NISQ) devices has driven the need for efficient design automation tools that can translate complex engineering models into executable quantum circuits. This study explores the development of automated quantum circuit design frameworks focused on gate optimization and noise-aware compilation, enabling practical quantum computation for engineering applications such as optimization, simulation, and control systems. Traditional circuit design methods often fail to account for hardware constraints, decoherence, and gate infidelity, which significantly affect computational accuracy on NISQ devices. To address these challenges, this research introduces a hybrid automation approach combining quantum transpilation, variational circuit pruning, and error-aware synthesis algorithms to enhance circuit reliability and scalability. The framework integrates quantum-classical co-design principles to optimize both logical and physical circuit layers, leveraging hardware-specific calibration data to adapt compilation strategies dynamically. Through simulations and benchmark analysis, the proposed system demonstrates significant improvements in quantum resource utilization, error mitigation, and gate depth reduction compared to conventional compilation methods. This work underscores the growing importance of design automation in quantum engineering, where algorithmic efficiency must be harmonized with physical constraints to realize functional and scalable quantum workflows. By establishing a methodology for gate-level optimization and noise-adaptive design, the study contributes to bridging the gap between theoretical quantum algorithms and real-world engineering implementations within the NISQ computing era.
Hybridizing machine learning (ML) with quantum computing has become an attractive strategy to increase computational power on Noisy Intermediate Scale Quantum (NISQ) devices. Although these can be potentially quantum advantage devices, their qubit numbers and noise are bounded and there are challenges when it comes to practical quantum circuit realization. This work concentrates on the creation of optimized quantum circuits via ML-based strategies, to enhance the performance of the circuits, to reduce the error rate and to accommodate the particular noise profile of the hardware of NISQ devices. The resulting suboptimal mappings with little or no consideration of noise and hardware topology in traditional quantum compilers can ruin the fidelity of quantum algorithm. Leveraging machine learning, and specifically reinforcement and supervised learning methods, our method learns to optimize compilation strategy for specific quantum hardware architecture. The paper proposes a framework that uses machine learning models to predict qubit mappings, gate decompositions, and transpilation paths that minimize gate depth and error accumulation. We also investigate transfer learning methods for propagating the learned compilation strategies to novel NISQ machines. Such methods are empirically validated on both simulated and real quantum hardware backends, providing evidence of circuit depth, execution time and error reductions. The results show that ML-assisted compilation can achieve better success probabilities for benchmark quantum algorithms like VQE and QAOA than conventional compilers. Furthermore, the work examines the interpretability of ML models providing hardware-aware optimization recommendations and understanding the noise patterns and methods of error correction. Our work highlights the key role of ML for transferring between theoretical quantum algorithms and their practical NISQ implementations. This integration boosts the immediate applicability of existing quantum devices and provides a basis for adaptive and scalable likelihood-based compilation for the era of fault-tolerant quantum computation. Our results motivate further investigation of hybrid classical-quantum workflows, in which ML iteratively improves compilation in accordance with changing hardware noise and capabilities. By improving quantum circuit compilation onNISQ computers, this work is taking steps toward the realization of quantum advantage in application scenarios such as optimization, cryptography, and quantum simulation without needing to wait for fully fault-tolerant large-scale quantum computers.
Abstract Quantum computing devices are inevitably subject to errors. To leverage quantum technologies for computational benefits in practical applications, quantum algorithms and protocols must be implemented reliably under noise and imperfections. Since noise and imperfections limit the size of quantum circuits that can be realized on a quantum device, developing quantum error mitigation techniques that do not require extra qubits and gates is of critical importance. In this work, we present a deep learning-based protocol for reducing readout errors on quantum hardware. Our technique is based on training an artificial neural network (NN) with the measurement results obtained from experiments with simple quantum circuits consisting of singe-qubit gates only. With the NN and deep learning, non-linear noise can be corrected, which is not possible with the existing linear inversion methods. The advantage of our method against the existing methods is demonstrated through quantum readout error mitigation experiments performed on IBM five-qubit quantum devices.
In the current era of Noisy Intermediate-Scale Quantum (NISQ) technology, the practical use of quantum computers remains inhibited by our inability to aptly decouple qubits from their environment to mitigate computational errors. In this work, we introduce an approach by which knowledge of a qubit's initial quantum state and the standard parameters describing its decoherence can be leveraged to mitigate the noise present during the execution of a single-qubit gate. We benchmark our protocol using cloud-based access to IBM quantum processors. On ibmq_rome, we demonstrate a reduction of the single-qubit error rate by 38%, from 1.6×10−3 to 1.0×10−3, provided the initial state of the input qubit is known. On ibmq_bogota, we prove that our protocol will never decrease gate fidelity, provided the system's T1 and T2 times have not drifted above 100 times their assumed values. The protocol can be used to reduce quantum state preparation errors, as well as to improve the fidelity of quantum circuits for which some knowledge of the qubits' intermediate states can be inferred. This work presents a pathway to using information about noise levels and quantum state distributions to significantly reduce error rates associated with quantum gates via optimized decomposition into native gates.