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Inductance extractions with low- and high-Tc technology SFQ circuits in absence of superconducting ground plane

C.J. Fourie, Romain Collot, Pascal Febvre, N. Bergeal, Jérôme Lesueur, Jürgen Kunert, H.-G. Meyer

Published Oct 7, 2012• 0 citations
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A simple test circuit of the rapid single-flux-quantum (RSFQ) logic family has been implemented in a planarized all-refractory technology using only two superconducting layers and small Nb/AlOx/Nb Josephson junctions (nominally 1.5×1.5 μm2) with critical current density jc≊6 kA/cm2. A special layout design of the integrated circuit (including a SFQ pulse generator, Josephson transmission line, and T flip–flop) was used to reduce 3D inductances resulting from absence of the ground plane. For samples with various junction parameters, the maximum frequency of the SFQ pulse train, which could be divided by 2 by the flip–flop, ranged from 200 to 370 GHz.
YBa2_{2}2​Cu3_{3}3​O7−δ_{7-\delta }7−δ​Single Flux Quantum Flip Flop Directly Written With a Focused Helium Ion Beam
Superconducting logic circuits based on low transition temperature (Tc) are attractive due to their intrinsic low power consumption and high operating frequency. They have a wide variety of applications (particularly in future computing), but are difficult to use because they require cooling with liquid helium to operate. The current high Tclogic circuit based on YBa2Cu3O7-δ(YBCO) already has the ability to operate at a temperature above 4 K. However, this material is difficult to integrate into large-scale circuits by the traditional YBCO junction fabrication process. The limits of fabrication methods are the bottleneck stifling this material's potential for integration into logic circuits. As such, in this paper we aim to advance the state of the art in junction fabrication technology. Here we report the demonstration of a high Tcsuperconducting single flux quantum (SFQ) circuit made by a focused helium ion beam that is easily fabricated and can readily be incorporated into a large-scale integration with nano-scale junctions for future applications. An inductively coupled readout superconducting quantum interference device (SQUID) is employed to reduce the circuit complexity. The circuit parameters and performance are discussed.
We designed the single-flux-quantum (SFQ) circuits that were fabricating using the NEC 2.5 kA/cm2standard process that has four Nb layers. Before designing circuits with two ground planes, we estimated sheet inductances of the base and counter planes using simple rectangular-shape inductors. Estimated sheet inductance of the base plane was 0.75 of the original value for the circuits with only under-ground plane. For the counter plane, sheet inductance was estimated to be 0.55 of the original value. We designed a 2-branch D-FF gate and fabricated SFQ circuits including the 2-branch D-FF using the NEC standard process. Parasitic inductances of the counter layer in the 2-branch D-FF were effectively minimized using two ground planes and frequency dependences of the lower bias margin were improved.