International Journal of Academic and Industrial Research Innovations(IJAIRI)

Photonic-Interconnected Quantum Chiplets for Modular and Networked Quantum Computing

Murali Krishna Pasupuleti

Published May 24, 2026• 0 citations

Abstract

Abstract: This study investigates photonic-interconnected quantum chiplets as a modular hardware pathway for scalable and networked quantum computing. The central problem is that monolithic quantum processors face compounding constraints in yield, wiring density, cryogenic routing, interconnect loss, calibration complexity and non-local connectivity. Photonic interconnection offers a technically plausible route to divide a large quantum computer into smaller processors while preserving quantum communication across modules through fibre links, photonic switches, optical transduction or integrated photonic interposers. The paper develops an academically rigorous framework that connects quantum-chiplet architecture, photonic integration, quantum error correction, control latency and manufacturability. It uses secondary real-data anchors from recent public demonstrations and a transparent engineering analysis to evaluate whether modular photonic networking can satisfy requirements for distributed logical qubits, entanglement generation and fault-tolerant operation. Results indicate that photonic chiplets can reduce scaling penalties relative to a monolithic wiring strategy when interconnect loss, feed-forward latency and module yield are jointly optimized. The study concludes that photonic-interconnected chiplets are not a minor packaging improvement but a possible architectural transition comparable to the movement from single-die classical processors to heterogeneous chiplet systems. The strongest contribution is a system-level evaluation model that links physical photonic performance with computer-architecture metrics and identifies the practical thresholds that must be met for Nature-level experimental validation. Keywords quantum computing chips, photonic chiplets, modular quantum computing, quantum interconnects, distributed quantum processors, silicon photonics, quantum networking, fault-tolerant quantum computing, optical interposers, quantum error correction, entanglement routing, wafer-scale quantum manufacturing, cryogenic control, quantum architecture, quantum hardware scalability

DOI: 10.62311/nesx/rp9-30052026

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