Abstract This work presents a resource-efficient architecture for quantum 5:2 compressors, addressing the prohibitively high T-count and circuit depth of exact arithmetic in the Noisy Intermediate-Scale Quantum (NISQ) regime. We implement a Hybrid Approximate-Exact synthesis methodology that fundamentally alters the logic synthesis path to prioritize quantum cost over strict logical equivalence. The proposed design intentionally isolates and excludes the fourth input bit (í µí±¥ 4)from the critical carry computation path during the initial approximation stage, significantly pruning the required Toffoli gate count. To mitigate the induced error, the proposed approach integrate a dedicated Error Correction Module (ECM) based on half-adder logic that realigns the significance weights of the intermediate sum and carry vectors. Validation via Qiskit Aer exhaustive statevector simulation confirms that this architecture achieves a superior Pareto frontier between circuit fidelity and arithmetic precision compared to fully exact baselines. The resulting topology minimizes decoherence-induced errors by reducing the gate depth, providing a viable arithmetic primitive for error-tolerant quantum algorithms.
Abstract This work presents a resource-efficient architecture for quantum 5:2 compressors, addressing the prohibitively high T-count and circuit depth of exact arithmetic in the Noisy Intermediate-Scale Quantum (NISQ) regime. We implement a Hybrid Approximate-Exact synthesis methodology that fundamentally alters the logic synthesis path to prioritize quantum cost over strict logical equivalence. The proposed design intentionally isolates and excludes the fourth input bit (í µí±¥ 4)from the critical carry computation path during the initial approximation stage, significantly pruning the required Toffoli gate count. To mitigate the induced error, the proposed approach integrate a dedicated Error Correction Module (ECM) based on half-adder logic that realigns the significance weights of the intermediate sum and carry vectors. Validation via Qiskit Aer exhaustive statevector simulation confirms that this architecture achieves a superior Pareto frontier between circuit fidelity and arithmetic precision compared to fully exact baselines. The resulting topology minimizes decoherence-induced errors by reducing the gate depth, providing a viable arithmetic primitive for error-tolerant quantum algorithms.
The "Noisy intermediate-scale quantum" NISQ machine era primarily focuses on mitigating noise, controlling errors, and executing high-fidelity operations, hence requiring shallow circuit depth and noise robustness. Approximate computing is a novel computing paradigm that produces imprecise results by relaxing the need for fully precise output for error-tolerant applications including multimedia, data mining, and image processing. We investigate how approximate computing can improve the noise resilience of quantum adder circuits in NISQ quantum computing. We propose five designs of approximate quantum adders to reduce depth while making them noise-resilient, in which three designs are with carryout, while two are without carryout. We have used novel design approaches that include approximating the Sum only from the inputs (pass-through designs) and having zero depth, as they need no quantum gates. The second design style uses a single CNOT gate to approximate the SUM with a constant depth of O(1). We performed our experimentation on IBM Qiskit on noise models including thermal, depolarizing, amplitude damping, phase damping, and bitflip: (i) Compared to exact quantum ripple carry adder without carryout the proposed approximate adders without carryout have improved fidelity ranging from 8.34% to 219.22%, and (ii) Compared to exact quantum ripple carry adder with carryout the proposed approximate adders with carryout have improved fidelity ranging from 8.23% to 371%. Further, the proposed approximate quantum adders are evaluated in terms of various error metrics.
Abstract Quantum arithmetic circuits, such as adders and multipliers, are essential for many quantum algorithms, but their practical deployment on noisy intermediate-scale quantum (NISQ) devices remains challenging due to limited coherence times and high gate error rates. In this paper, we propose Qaradox, a configurable approximate quantum multiplier architecture that achieves higher computation accuracy than its exact counterpart under realistic quantum noise. The proposed architecture introduces a novel class of controlled quantum adders that enable flexible combinations of exact, approximate, and truncated operations, allowing the quantum circuit to be tailored to hardware-specific noise characteristics. Experimental results using IBM’s 127-qubit Brisbane noise model show that Qaradox reduces the error rate (ER), normalized mean error distance (NMED), and mean relative error distance (MRED) by up to 23.7%, 80.3%, and 88.1%, respectively, compared to the fully exact multiplier. Furthermore, when applied to image sharpening, the proposed architecture improves peak signal-to-noise ratio (PSNR) by more than three times and increases structural similarity index measure (SSIM) from 0.00 to 0.83, effectively recovering visual quality lost in exact designs. These results demonstrate that approximation, when applied structurally and selectively, can enhance both robustness and correctness in quantum arithmetic for NISQ-era systems.
In recent decades, quantum computing has witnessed remarkable progress, achieved through various advancements across the technology stack, such as quantum error-correcting codes and quantum algorithms. It is noteworthy that several promising algorithms incorporate quantum arithmetic circuits as fundamental building blocks. However, the inherent properties of quantum circuits challenge the efficiency of quantum arithmetic circuits, prompting creative solutions. While several quantum arithmetic circuits have been proposed, there is still a substantial gap in quantum arithmetic circuits optimization. For example, methods for integrating classical techniques such as high radix strategy into quantum designs still remain underexplored, highlighting a significant space for further advancement. This thesis aims to improve the performance of quantum arithmetic designs by integrating classical arithmetic circuit design techniques. Specifically, this thesis contains the following research: (1) The utilization of classical higher radix strategy to enhance quantum addition, reducing overall cost by lowering T-depth and T-count. The proposed design outperforms existing quantum carry-lookahead adders. (2) The application of Ling structure, achieving a reduced Toffoli-depth of 4log(n/2). (3) The exploration of the Kogge-Stone architecture, resulting in the lowest Toffoli-depth of log(n) for quantum adders. (4) The development of an efficient modular addition framework using carry-save architecture, demonstrating a 33.3% improvement in Toffoli depth compared to existing designs. (5) The design of an optimized quantum non-restoring divider framework. (6) A comprehensive overview of current advancements in quantum arithmetic designs, offering insights into potential research directions. These proposed designs are mapped to real-world quantum hardware architectures, including Noisy Intermediate-Scale Quantum systems, to validate their functionality and evaluate efficiency. Their applications in quantum machine learning and cryptography further underscore the broader impact of these improvements. Overall, this thesis makes significant advancements in reducing quantum circuit depth and improving resource efficiency, contributing to the development of scalable and efficient large-scale quantum circuits. By adapting classical design strategies to quantum circuits, it not only enhances various quantum circuit designs but also fosters further exploration at the intersection of classical and quantum computing.
Approximate quantum adders are gaining traction in NISQ-era computing for their potential to reduce quantum resource usage while preserving computational accuracy. In this work, we evaluate two 8-qubit hybrid approximate quantum adders that combine a 2-qubit approximate block, either a pass-through Copy Adder or a CNOT-based design, with a 6-qubit Cuccaro ripple-carry adder. Simulations are conducted using IBM's Qiskit framework under realistic noise models, including bit-flip, depolarizing, and thermal noise. Compared to the exact 8-bit Cuccaro adder, our designs reduce quantum cost and circuit depth by over 20 percent and achieve up to 79.3 percent higher output probability under noisy conditions. These results highlight the robustness and efficiency of approximate logic in noisy quantum environments and confirm its practicality for near-term quantum hardware.
Qudit has emerged as a promising system for next-generation quantum computers because of its significant advantages in multi-phase problems and quantum error correction, while multi-qudit operations are yet to be implemented. As one of the basic operations, quantum addition has been widely applied in number factorization and discrete logarithms. Meanwhile, the physical constraints of noisy intermediate-scale quantum (NISQ) devices necessitate the development of fault-tolerant quantum adders and the exploration of quaternary operations on binary devices is still in its infancy. In this work, we propose the first approach for implementing quaternary quantum addition algorithms by employing primitive quantum gates. A library of quaternary quantum gates and quaternary quantum full adders (Q2FA) able to produce carry-first results, along with lower depth and fewer T-gates optimizations are proposed and evaluated, where all circuits are implemented on IBM Qiskit SDK. Extensive experiments show that our proposed Q2FA design, together with the optimization techniques, reduces T-depth by up to 1.4× and T-count by 1.7× compared with baseline quantum circuits without depth and T-gate optimizations. Meanwhile, the scalability of the proposed Q2FA is demonstrated by constructing quantum carry-ripple adders. Under noisy conditions, our proposed design can achieve an overall fidelity increase by 1.4×.
Quantum Computing is making significant advancements toward creating machines capable of implementing quantum algorithms in various fields, such as quantum cryptography, quantum image processing, and optimization. The development of quantum arithmetic circuits for modulo addition is vital for implementing these quantum algorithms. While it is ideal to use quantum circuits based on fault-tolerant gates to overcome noise and decoherence errors, the current Noisy Intermediate Scale Quantum (NISQ) era quantum computers cannot handle the additional computational cost associated with fault-tolerant designs. Our research aims to minimize circuit depth, which can reduce noise and facilitate the implementation of quantum modulo addition circuits on NISQ machines. This work presents quantum carry-lookahead modulo (2n - 1) adder (QCLMA), which is designed to receive two n-bit numbers and perform their addition with an O(log n) depth. Compared to existing work of O(n) depth, our proposed QCLMA reduces the depth and helps increase the noise fidelity. In order to increase error resilience, we also focus on creating a tree structure based Carry path, unlike the chain based Carry path of the current work. We run experiments on Quantum Computer IBM Cairo to evaluate the performance of the proposed QCLMA against the existing work and define Quantum State Fidelity Ratio (QSFR) to quantify the closeness of the correct output to the top output. When compared against existing work, the proposed QCLMA achieves a 47.21% increase in QSFR for 4-qubit modulo addition showcasing its superior noise fidelity.