Quantum Computing is making significant advancements toward creating machines capable of implementing quantum algorithms in various fields, such as quantum cryptography, quantum image processing, and optimization. The development of quantum arithmetic circuits for modulo addition is vital for implementing these quantum algorithms. While it is ideal to use quantum circuits based on fault-tolerant gates to overcome noise and decoherence errors, the current Noisy Intermediate Scale Quantum (NISQ) era quantum computers cannot handle the additional computational cost associated with fault-tolerant designs. Our research aims to minimize circuit depth, which can reduce noise and facilitate the implementation of quantum modulo addition circuits on NISQ machines. This work presents quantum carry-lookahead modulo (2n - 1) adder (QCLMA), which is designed to receive two n-bit numbers and perform their addition with an O(log n) depth. Compared to existing work of O(n) depth, our proposed QCLMA reduces the depth and helps increase the noise fidelity. In order to increase error resilience, we also focus on creating a tree structure based Carry path, unlike the chain based Carry path of the current work. We run experiments on Quantum Computer IBM Cairo to evaluate the performance of the proposed QCLMA against the existing work and define Quantum State Fidelity Ratio (QSFR) to quantify the closeness of the correct output to the top output. When compared against existing work, the proposed QCLMA achieves a 47.21% increase in QSFR for 4-qubit modulo addition showcasing its superior noise fidelity.
Quantum Computing is making significant advancements toward creating machines capable of implementing quantum algorithms in various fields, such as quantum cryptography, quantum image processing, and optimization. The development of quantum arithmetic circuits for modulo addition is vital for implementing these quantum algorithms. While it is ideal to use quantum circuits based on fault-tolerant gates to overcome noise and decoherence errors, the current Noisy Intermediate Scale Quantum (NISQ) era quantum computers cannot handle the additional computational cost associated with fault-tolerant designs. Our research aims to minimize circuit depth, which can reduce noise and facilitate the implementation of quantum modulo addition circuits on NISQ machines. This work presents quantum carry-lookahead modulo (2n - 1) adder (QCLMA), which is designed to receive two n-bit numbers and perform their addition with an O(log n) depth. Compared to existing work of O(n) depth, our proposed QCLMA reduces the depth and helps increase the noise fidelity. In order to increase error resilience, we also focus on creating a tree structure based Carry path, unlike the chain based Carry path of the current work. We run experiments on Quantum Computer IBM Cairo to evaluate the performance of the proposed QCLMA against the existing work and define Quantum State Fidelity Ratio (QSFR) to quantify the closeness of the correct output to the top output. When compared against existing work, the proposed QCLMA achieves a 47.21% increase in QSFR for 4-qubit modulo addition showcasing its superior noise fidelity.
The "Noisy intermediate-scale quantum" NISQ machine era primarily focuses on mitigating noise, controlling errors, and executing high-fidelity operations, hence requiring shallow circuit depth and noise robustness. Approximate computing is a novel computing paradigm that produces imprecise results by relaxing the need for fully precise output for error-tolerant applications including multimedia, data mining, and image processing. We investigate how approximate computing can improve the noise resilience of quantum adder circuits in NISQ quantum computing. We propose five designs of approximate quantum adders to reduce depth while making them noise-resilient, in which three designs are with carryout, while two are without carryout. We have used novel design approaches that include approximating the Sum only from the inputs (pass-through designs) and having zero depth, as they need no quantum gates. The second design style uses a single CNOT gate to approximate the SUM with a constant depth of O(1). We performed our experimentation on IBM Qiskit on noise models including thermal, depolarizing, amplitude damping, phase damping, and bitflip: (i) Compared to exact quantum ripple carry adder without carryout the proposed approximate adders without carryout have improved fidelity ranging from 8.34% to 219.22%, and (ii) Compared to exact quantum ripple carry adder with carryout the proposed approximate adders with carryout have improved fidelity ranging from 8.23% to 371%. Further, the proposed approximate quantum adders are evaluated in terms of various error metrics.
Progress in quantum hardware design is progressing toward machines of sufficient size to begin realizing quantum algorithms in disciplines such as encryption and physics. Quantum circuits for addition are crucial to realize many quantum algorithms on these machines. Ideally, quantum circuits based on fault-tolerant gates and error-correcting codes should be used as they tolerant environmental noise. However, current machines called Noisy Intermediate Scale Quantum (NISQ) machines cannot support the overhead associated with fault-tolerant design. In response, low depth circuits such as quantum carry lookahead adders (QCLA)s have caught the attention of researchers. The risk for noise errors and decoherence increase as the number of gate layers (or depth) in the circuit increases. This work presents an out-of-place QCLA based on Clifford+T gates. The QCLAs optimized for T gate count and make use of a novel uncomputation gate to save T gates. We base our QCLAs on Clifford+T gates because they can eventually be made fault-tolerant with error-correcting codes once quantum hardware that can support fault-tolerant designs becomes available. We focus on T gate cost as the T gate is significantly more costly to make fault-tolerant than the other Clifford+T gates. The proposed QCLAs are compared and shown to be superior to existing works in terms of T-count and therefore the total number of quantum gates. Finally, we illustrate the application of the proposed QCLAs in quantum image processing by presenting quantum circuits for bilinear interpolation.
Progress in quantum hardware design is progressing toward machines of sufficient size to begin realizing quantum algorithms in disciplines such as encryption and physics. Quantum circuits for addition are crucial to realize many quantum algorithms on these machines. Ideally, quantum circuits based on fault-tolerant gates and error-correcting codes should be used as they tolerant environmental noise. However, current machines called Noisy Intermediate Scale Quantum (NISQ) machines cannot support the overhead associated with faulttolerant design. In response, low depth circuits such as quantum carry lookahead adders (QCLA)s have caught the attention of researchers. The risk for noise errors and decoherence increase as the number of gate layers (or depth) in the circuit increases. This work presents an out-of-place QCLA based on Clifford+T gates. The QCLAs optimized for T gate count and make use of a novel uncomputation gate to save T gates. We base our QCLAs on Clifford+T gates because they can eventually be made faulttolerant with error-correcting codes once quantum hardware that can support fault-tolerant designs becomes available. We focus on T gate cost as the T gate is significantly more costly to make faulttolerant than the other Clifford+T gates. The proposed QCLAs are compared and shown to be superior to existing works in terms of T-count and therefore the total number of quantum gates. Finally, we illustrate the application of the proposed QCLAs in quantum image processing by presenting quantum circuits for bilinear interpolation.
In recent decades, quantum computing has witnessed remarkable progress, achieved through various advancements across the technology stack, such as quantum error-correcting codes and quantum algorithms. It is noteworthy that several promising algorithms incorporate quantum arithmetic circuits as fundamental building blocks. However, the inherent properties of quantum circuits challenge the efficiency of quantum arithmetic circuits, prompting creative solutions. While several quantum arithmetic circuits have been proposed, there is still a substantial gap in quantum arithmetic circuits optimization. For example, methods for integrating classical techniques such as high radix strategy into quantum designs still remain underexplored, highlighting a significant space for further advancement. This thesis aims to improve the performance of quantum arithmetic designs by integrating classical arithmetic circuit design techniques. Specifically, this thesis contains the following research: (1) The utilization of classical higher radix strategy to enhance quantum addition, reducing overall cost by lowering T-depth and T-count. The proposed design outperforms existing quantum carry-lookahead adders. (2) The application of Ling structure, achieving a reduced Toffoli-depth of 4log(n/2). (3) The exploration of the Kogge-Stone architecture, resulting in the lowest Toffoli-depth of log(n) for quantum adders. (4) The development of an efficient modular addition framework using carry-save architecture, demonstrating a 33.3% improvement in Toffoli depth compared to existing designs. (5) The design of an optimized quantum non-restoring divider framework. (6) A comprehensive overview of current advancements in quantum arithmetic designs, offering insights into potential research directions. These proposed designs are mapped to real-world quantum hardware architectures, including Noisy Intermediate-Scale Quantum systems, to validate their functionality and evaluate efficiency. Their applications in quantum machine learning and cryptography further underscore the broader impact of these improvements. Overall, this thesis makes significant advancements in reducing quantum circuit depth and improving resource efficiency, contributing to the development of scalable and efficient large-scale quantum circuits. By adapting classical design strategies to quantum circuits, it not only enhances various quantum circuit designs but also fosters further exploration at the intersection of classical and quantum computing.
Addition is the most basic operation of computing based on a bit system. There are various addition algorithms considering multiple number systems and hardware, and studies for a more efficient addition are still ongoing. Quantum computing based on qubits as the information unit asks for the design of a new addition because it is, physically, wholly different from the existing frequency-based computing in which the minimum information unit is a bit. In this paper, we propose an efficient quantum circuit of modular addition, which reduces the number of gates and the depth. The proposed modular addition is for the Galois Field GF(2n−1), which is important as a finite field basis in various domains, such as cryptography. Its design principle was from the ripple carry addition (RCA) algorithm, which is the most widely used in existing computers. However, unlike conventional RCA, the storage of the final carry is not needed due to modifying existing diminished-1 modulo 2n−1 adders. Our proposed adder can produce modulo sum within the range 0,2n−2 by fewer qubits and less depth. For comparison, we analyzed the proposed quantum addition circuit over GF(2n−1) and the previous quantum modular addition circuit for the performance of the number of qubits, the number of gates, and the depth, and simulated it with IBM’s simulator ProjectQ.
Quantum modular adders are one of the most fundamental yet versatile quantum computation operations. They help implement the functions of higher complexity, such as subtraction and multiplication, which are used in applications, such as quantum cryptanalysis, quantum image processing, and securing communication. To the best of our knowledge, there is no existing design of quantum modulo (2n+1) adder (QMA). In this work, we propose four quantum adders targeted specifically for modulo (2n+1) addition. These adders can provide both regular and modulo (2n+1) sum concurrently, enhancing their application in residue number system-based arithmetic. Our first design, QMA1, is a novel quantum modulo (2n+1) adder. The second proposed adder, QMA2, optimizes the utilization of quantum gates within the QMA1, resulting in 37.5% reduced CNOT gate count, 46.15% reduced CNOT depth, and 26.5% decrease in both Toffoli gates and depth. We propose a third adder QMA3 that uses zero resets, a dynamic circuits-based feature that reuses qubits, leading to 25% savings in qubit count. Our fourth design, QMA4, demonstrates the benefit of incorporating additional zero resets to achieve a purer∣0$\rangle $state, reducing quantum state preparation errors. Notably, we conducted experiments using 5-qubit configurations of the proposed modulo (2n+1) adders on the IBM Washington, a 127-qubit quantum computer based on the Eagle R1 architecture, to demonstrate a 28.8% reduction in QMA1’s error of which do the following: 1) 18.63% error reduction happens due to gate/depth reduction in QMA2; 2) 2.53% drop in error due to qubit reduction in QMA3; and 3) 7.64% error decreased due to application of additional zero resets in QMA4.