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Applied Sciences

Quantum Modular Adder over GF(2n − 1) without Saving the Final Carry

Aeyoung Kim, Seong-Min Cho, Chang-Bae Seo, Sokjoon Lee, Seung-Hyun Seo

Published Mar 25, 2021• 8 citations
Publisher

Abstract

Addition is the most basic operation of computing based on a bit system. There are various addition algorithms considering multiple number systems and hardware, and studies for a more efficient addition are still ongoing. Quantum computing based on qubits as the information unit asks for the design of a new addition because it is, physically, wholly different from the existing frequency-based computing in which the minimum information unit is a bit. In this paper, we propose an efficient quantum circuit of modular addition, which reduces the number of gates and the depth. The proposed modular addition is for the Galois Field GF(2n−1), which is important as a finite field basis in various domains, such as cryptography. Its design principle was from the ripple carry addition (RCA) algorithm, which is the most widely used in existing computers. However, unlike conventional RCA, the storage of the final carry is not needed due to modifying existing diminished-1 modulo 2n−1 adders. Our proposed adder can produce modulo sum within the range 0,2n−2 by fewer qubits and less depth. For comparison, we analyzed the proposed quantum addition circuit over GF(2n−1) and the previous quantum modular addition circuit for the performance of the number of qubits, the number of gates, and the depth, and simulated it with IBM’s simulator ProjectQ.

DOI
10.3390/app11072949

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Addition is the most basic operation of computing based on a bit system. There are various addition algorithms considering multiple number systems and hardware, and studies for a more efficient addition are still ongoing. Quantum computing based on qubits as the information unit asks for the design of a new addition because it is, physically, wholly different from the existing frequency-based computing in which the minimum information unit is a bit. In this paper, we propose an efficient quantum circuit of modular addition, which reduces the number of gates and the depth. The proposed modular addition is for the Galois Field GF(2n−1), which is important as a finite field basis in various domains, such as cryptography. Its design principle was from the ripple carry addition (RCA) algorithm, which is the most widely used in existing computers. However, unlike conventional RCA, the storage of the final carry is not needed due to modifying existing diminished-1 modulo 2n−1 adders. Our proposed adder can produce modulo sum within the range 0,2n−2 by fewer qubits and less depth. For comparison, we analyzed the proposed quantum addition circuit over GF(2n−1) and the previous quantum modular addition circuit for the performance of the number of qubits, the number of gates, and the depth, and simulated it with IBM’s simulator ProjectQ.
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Quantum Computing is making significant advancements toward creating machines capable of implementing quantum algorithms in various fields, such as quantum cryptography, quantum image processing, and optimization. The development of quantum arithmetic circuits for modulo addition is vital for implementing these quantum algorithms. While it is ideal to use quantum circuits based on fault-tolerant gates to overcome noise and decoherence errors, the current Noisy Intermediate Scale Quantum (NISQ) era quantum computers cannot handle the additional computational cost associated with fault-tolerant designs. Our research aims to minimize circuit depth, which can reduce noise and facilitate the implementation of quantum modulo addition circuits on NISQ machines. This work presents quantum carry-lookahead modulo (2n - 1) adder (QCLMA), which is designed to receive two n-bit numbers and perform their addition with an O(log n) depth. Compared to existing work of O(n) depth, our proposed QCLMA reduces the depth and helps increase the noise fidelity. In order to increase error resilience, we also focus on creating a tree structure based Carry path, unlike the chain based Carry path of the current work. We run experiments on Quantum Computer IBM Cairo to evaluate the performance of the proposed QCLMA against the existing work and define Quantum State Fidelity Ratio (QSFR) to quantify the closeness of the correct output to the top output. When compared against existing work, the proposed QCLMA achieves a 47.21% increase in QSFR for 4-qubit modulo addition showcasing its superior noise fidelity.
Novel Optimized Designs of Modulo 2n+12n+12n+1 Adder for Quantum Computing
Quantum modular adders are one of the most fundamental yet versatile quantum computation operations. They help implement functions of higher complexity, such as subtraction and multiplication, which are used in applications such as quantum cryptanalysis, quantum image processing, and securing communication. To the best of our knowledge, there is no existing design of quantum modulo (2n+1)(2n+1)(2n+1) adder. In this work, we propose four quantum adders targeted specifically for modulo (2n+1)(2n+1)(2n+1) addition. These adders can provide both regular and modulo (2n+1)(2n+1)(2n+1) sum concurrently, enhancing their application in residue number system based arithmetic. Our first design, QMA1, is a novel quantum modulo (2n+1)(2n+1)(2n+1) adder. The second proposed adder, QMA2, optimizes the utilization of quantum gates within the QMA1, resulting in 37.5% reduced CNOT gate count, 46.15% reduced CNOT depth, and 26.5% decrease in both Toffoli gates and depth. We propose a third adder QMA3 that uses zero resets, a dynamic circuits based feature that reuses qubits, leading to 25% savings in qubit count. Our fourth design, QMA4, demonstrates the benefit of incorporating additional zero resets to achieve a purer zero state, reducing quantum state preparation errors. Notably, we conducted experiments using 5-qubit configurations of the proposed modulo (2n+1)(2n+1)(2n+1) adders on the IBM Washington, a 127-qubit quantum computer based on the Eagle R1 architecture, to demonstrate a 28.8% reduction in QMA1's error of which: (i) 18.63% error reduction happens due to gate and depth reduction in QMA2, and (ii) 2.53% drop in error due to qubit reduction in QMA3, and (iii) 7.64% error decreased due to application of additional zero resets in QMA4.
Quantum modular multipliers are a promising development in the field of quantum computing that aim to perform modular multiplication faster and more efficiently than classical algorithms. This is achieved by encoding the numbers being multiplied into quantum bits (qubits) and using quantum gates to manipulate them in a way that represents the calculation. Since quantum physics principles like superposition and entanglement dramatically speed up processing compared to conventional computing, many calculations may be run simultaneously. Quantum modular multipliers have the potential to have a significant impact in a range of fields, including cryptography and beyond, since they offer a faster and more efficient way to do modular multiplications. Several fields, including simulation, optimization, and cryptography, can benefit from the use of quantum computing.One of the crucial operations in many of these applications is modular multiplication, a sort of multiplication that requires obtaining the remainder of the product of two numbers when divided by a third number. In this paper, we provide a novel modular multiplication method based on a quantum algorithm. To examine its complexity and compare it to that of current adders, we employ a novel form of adder that is intended to not retain the final carry. This adder's decrease percentage in terms of gates and depth is roughly 70%. Our method takes advantage of the special qualities of qubits to complete the computation significantly more quickly than conventional algorithms. It is based on the fundamental ideas of quantum physics, such as superposition and entanglement.
Quantum addition is a crucial operation for the implementation of quantum algorithms. For this reason, many researchers focused their attention on the design of quantum adders. The two main schemes for adders are the Ripple Carry Adder (RCA), which is considered slow because its execution time depends on the length of the operands, and the Carry Look-ahead Adder, which can reduce the execution time anticipating the computation of the carry, but is more complex and expensive in terms of quantum cost. A good alternative to the slow ripple carry adder and the complex carry-lookahead adder is represented by the Carry Select Adder (CSA), which divides the addition execution into subgroups of qubits and exploits the simplicity of the RCA. In this work, we propose a new quantum version of the CSA, based on an efficient realization of the RCA, chosen among the possible RCAs proposed in the literature. To this end, we show how to design the quantum CSA blocks and how to concatenate them to produce the result. The proposed quantum CSA has been simulated on the DDSIM tool of Munich Quantum Toolkit (MQT) to check its correctness, and the performance has been analyzed using the three conventional parameters for quantum circuits: number of qubits, quantum cost and delay. For each of these parameters, a formula is given as a function of the size of the operand length and the number of blocks in the quantum CSA. The CSA proposed shows a speedup variable from 2.5 to 6 for operands up to 64 qubits and a block size that goes from 2 to n/2.
This paper presents the design, optimization, and simulation of arithmetic circuits using reversible logic for quantum computing applications. The motivation behind this work is to achieve resource-efficient computation through reduced quantum cost, minimized garbage outputs, and lower ancilla requirements. The methodology involves implementing Half Adders, Full Adders, Multiplexers, and Ripple Carry Adders (RCAs) using Toffoli and Peres gates. The proposed 8-bit RCA achieves a quantum cost of 58 using 24 qubits, 8 garbage outputs, and 6 ancilla inputs—showing a significant improvement over conventional Toffoli-based designs that require higher quantum cost and resources. Simulations were conducted on IBM Qiskit and Google Colab using the Qiskit SDK to validate circuit correctness and scalability. The obtained results demonstrate superior resource efficiency and confirm the feasibility of reversible-logic-based quantum arithmetic as a foundation for scalable quantum arithmetic logic units (ALUs) and processors.