Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

Physica Scripta

A noise-resilient and configurable approximate quantum multiplier for enhanced computation fidelity on NISQ devices

Sungyoun Hwang, Hyunjoon Shin, Hyoju Seo, Yongtae Kim

Published Oct 22, 2025• 1 citation
Publisher

Abstract

Abstract Quantum arithmetic circuits, such as adders and multipliers, are essential for many quantum algorithms, but their practical deployment on noisy intermediate-scale quantum (NISQ) devices remains challenging due to limited coherence times and high gate error rates. In this paper, we propose Qaradox, a configurable approximate quantum multiplier architecture that achieves higher computation accuracy than its exact counterpart under realistic quantum noise. The proposed architecture introduces a novel class of controlled quantum adders that enable flexible combinations of exact, approximate, and truncated operations, allowing the quantum circuit to be tailored to hardware-specific noise characteristics. Experimental results using IBM’s 127-qubit Brisbane noise model show that Qaradox reduces the error rate (ER), normalized mean error distance (NMED), and mean relative error distance (MRED) by up to 23.7%, 80.3%, and 88.1%, respectively, compared to the fully exact multiplier. Furthermore, when applied to image sharpening, the proposed architecture improves peak signal-to-noise ratio (PSNR) by more than three times and increases structural similarity index measure (SSIM) from 0.00 to 0.83, effectively recovering visual quality lost in exact designs. These results demonstrate that approximation, when applied structurally and selectively, can enhance both robustness and correctness in quantum arithmetic for NISQ-era systems.

DOI
10.1088/1402-4896/ae1672

Related papers

Comparative Analysis of Quantum Adder Circuits in Computation Accuracy on Noisy Quantum Computers

Sungyoun Hwang, Hyoju Seo, Yongtae Kim

Since the advent of quantum computing, the accuracy performance of quantum adders in Noisy Intermediate-Scale Quantum (NISQ) computing has received significant attention. This paper analyzes the accuracy of exact quantum adders in the NISQ environment. Our results show the impacts of noise vary significantly on the quantum circuits, reaching up to 86%, 0.23, and 0.66 in error rate (ER), normalized mean error distance (NMED), and mean relative error distance (MRED), respectively. Furthermore, the bitflip noise model impacts the greatest on quantum adders, showing, on average, 12.20, 11.30, and 11.62 times higher values in ER, NMED, and MRED, respectively. These findings highlight that the accuracy of exact quantum adders is affected by NISQ computing.

International SoC Design Conference•Aug 19, 2024•3 citations

Noise-Resilient and Reduced Depth Approximate Adders for NISQ Quantum Computing

Bhaskar Gaur, Travis S. Humble, Himanshu Thapliyal

The "Noisy intermediate-scale quantum" NISQ machine era primarily focuses on mitigating noise, controlling errors, and executing high-fidelity operations, hence requiring shallow circuit depth and noise robustness. Approximate computing is a novel computing paradigm that produces imprecise results by relaxing the need for fully precise output for error-tolerant applications including multimedia, data mining, and image processing. We investigate how approximate computing can improve the noise resilience of quantum adder circuits in NISQ quantum computing. We propose five designs of approximate quantum adders to reduce depth while making them noise-resilient, in which three designs are with carryout, while two are without carryout. We have used novel design approaches that include approximating the Sum only from the inputs (pass-through designs) and having zero depth, as they need no quantum gates. The second design style uses a single CNOT gate to approximate the SUM with a constant depth of O(1). We performed our experimentation on IBM Qiskit on noise models including thermal, depolarizing, amplitude damping, phase damping, and bitflip: (i) Compared to exact quantum ripple carry adder without carryout the proposed approximate adders without carryout have improved fidelity ranging from 8.34% to 219.22%, and (ii) Compared to exact quantum ripple carry adder with carryout the proposed approximate adders with carryout have improved fidelity ranging from 8.23% to 371%. Further, the proposed approximate quantum adders are evaluated in terms of various error metrics.

arXiv:2408.00927•ACM Great Lakes Symposium on VLSI (GLSVLSI)•May 31, 2023•11 citations

Can Less Accurate Be More Accurate? Surpassing Exact Multiplier with Approximate Design on NISQ Quantum Computers

Sungyoun Hwang, Hyoju Seo, Yongtae Kim

This paper presents a configurable approximate quantum multiplier that integrates approximate and exact controlled adders with a truncation scheme to balance accuracy and circuit complexity in noisy quantum environments. It achieves significant enhancements in error metrics over an exact multiplier, demonstrating its potential for noise-resilient quantum computing in noisy quantum devices.

ACM Symposium on Applied Computing•Mar 31, 2025•1 citation

Error Characterization of Exact Quantum Multipliers Under NISQ Noise Models

Hyunjoon Shin, Y. G. Kim

In quantum computing, quantum multiplier circuits serve as fundamental building blocks for a wide range of algorithms. Although numerous exact quantum multiplier designs have been presented so far, their practical implementation remains limited, as today's quantum computers are still in the noisy intermediate-scale quantum (NISQ) era, lacking full fault tolerance. This paper presents a comparative analysis of errors characteristics in exact quantum multiplier circuits under NISQ conditions. Our experimental results demonstrate that, under identical noise conditions, error rate (ER), normalized mean error distance (NMED), and mean relative error distance (MRED) vary by up to 1.95×, 4.40×, and 6.53×, respectively, across different multipliers. Furthermore, each multiplier exhibits distinct sensitivity patterns depending on the type of noise.

International SoC Design Conference•Oct 15, 2025•0 citations

Error-Resilient Quantum Circuit Design of Hybrid Approximate-Exact 5:2 Compressors for Arithmetic Applications

Sreeprad V S A L Manda, Aravindhan Alagarsamy, Dr.R.S. Ernest Ravindran +3 more

Abstract This work presents a resource-efficient architecture for quantum 5:2 compressors, addressing the prohibitively high T-count and circuit depth of exact arithmetic in the Noisy Intermediate-Scale Quantum (NISQ) regime. We implement a Hybrid Approximate-Exact synthesis methodology that fundamentally alters the logic synthesis path to prioritize quantum cost over strict logical equivalence. The proposed design intentionally isolates and excludes the fourth input bit (í µí±¥ 4)from the critical carry computation path during the initial approximation stage, significantly pruning the required Toffoli gate count. To mitigate the induced error, the proposed approach integrate a dedicated Error Correction Module (ECM) based on half-adder logic that realigns the significance weights of the intermediate sum and carry vectors. Validation via Qiskit Aer exhaustive statevector simulation confirms that this architecture achieves a superior Pareto frontier between circuit fidelity and arithmetic precision compared to fully exact baselines. The resulting topology minimizes decoherence-induced errors by reducing the gate depth, providing a viable arithmetic primitive for error-tolerant quantum algorithms.

•Feb 25, 2026•0 citations

Design and Evaluation of Low-Depth Approximate Quantum Computing

Taegyun Kim, Jungu Kang, Yeongkyo Seo

Approximate quantum adders are gaining traction in NISQ-era computing for their potential to reduce quantum resource usage while preserving computational accuracy. In this work, we evaluate two 8-qubit hybrid approximate quantum adders that combine a 2-qubit approximate block, either a pass-through Copy Adder or a CNOT-based design, with a 6-qubit Cuccaro ripple-carry adder. Simulations are conducted using IBM's Qiskit framework under realistic noise models, including bit-flip, depolarizing, and thermal noise. Compared to the exact 8-bit Cuccaro adder, our designs reduce quantum cost and circuit depth by over 20 percent and achieve up to 79.3 percent higher output probability under noisy conditions. These results highlight the robustness and efficiency of approximate logic in noisy quantum environments and confirm its practicality for near-term quantum hardware.

International SoC Design Conference•Oct 15, 2025•0 citations
Abstract Quantum arithmetic circuits, such as adders and multipliers, are essential for many quantum algorithms, but their practical deployment on noisy intermediate-scale quantum (NISQ) devices remains challenging due to limited coherence times and high gate error rates. In this paper, we propose Qaradox, a configurable approximate quantum multiplier architecture that achieves higher computation accuracy than its exact counterpart under realistic quantum noise. The proposed architecture introduces a novel class of controlled quantum adders that enable flexible combinations of exact, approximate, and truncated operations, allowing the quantum circuit to be tailored to hardware-specific noise characteristics. Experimental results using IBM’s 127-qubit Brisbane noise model show that Qaradox reduces the error rate (ER), normalized mean error distance (NMED), and mean relative error distance (MRED) by up to 23.7%, 80.3%, and 88.1%, respectively, compared to the fully exact multiplier. Furthermore, when applied to image sharpening, the proposed architecture improves peak signal-to-noise ratio (PSNR) by more than three times and increases structural similarity index measure (SSIM) from 0.00 to 0.83, effectively recovering visual quality lost in exact designs. These results demonstrate that approximation, when applied structurally and selectively, can enhance both robustness and correctness in quantum arithmetic for NISQ-era systems.
Since the advent of quantum computing, the accuracy performance of quantum adders in Noisy Intermediate-Scale Quantum (NISQ) computing has received significant attention. This paper analyzes the accuracy of exact quantum adders in the NISQ environment. Our results show the impacts of noise vary significantly on the quantum circuits, reaching up to 86%, 0.23, and 0.66 in error rate (ER), normalized mean error distance (NMED), and mean relative error distance (MRED), respectively. Furthermore, the bitflip noise model impacts the greatest on quantum adders, showing, on average, 12.20, 11.30, and 11.62 times higher values in ER, NMED, and MRED, respectively. These findings highlight that the accuracy of exact quantum adders is affected by NISQ computing.
The "Noisy intermediate-scale quantum" NISQ machine era primarily focuses on mitigating noise, controlling errors, and executing high-fidelity operations, hence requiring shallow circuit depth and noise robustness. Approximate computing is a novel computing paradigm that produces imprecise results by relaxing the need for fully precise output for error-tolerant applications including multimedia, data mining, and image processing. We investigate how approximate computing can improve the noise resilience of quantum adder circuits in NISQ quantum computing. We propose five designs of approximate quantum adders to reduce depth while making them noise-resilient, in which three designs are with carryout, while two are without carryout. We have used novel design approaches that include approximating the Sum only from the inputs (pass-through designs) and having zero depth, as they need no quantum gates. The second design style uses a single CNOT gate to approximate the SUM with a constant depth of O(1). We performed our experimentation on IBM Qiskit on noise models including thermal, depolarizing, amplitude damping, phase damping, and bitflip: (i) Compared to exact quantum ripple carry adder without carryout the proposed approximate adders without carryout have improved fidelity ranging from 8.34% to 219.22%, and (ii) Compared to exact quantum ripple carry adder with carryout the proposed approximate adders with carryout have improved fidelity ranging from 8.23% to 371%. Further, the proposed approximate quantum adders are evaluated in terms of various error metrics.
In quantum computing, quantum multiplier circuits serve as fundamental building blocks for a wide range of algorithms. Although numerous exact quantum multiplier designs have been presented so far, their practical implementation remains limited, as today's quantum computers are still in the noisy intermediate-scale quantum (NISQ) era, lacking full fault tolerance. This paper presents a comparative analysis of errors characteristics in exact quantum multiplier circuits under NISQ conditions. Our experimental results demonstrate that, under identical noise conditions, error rate (ER), normalized mean error distance (NMED), and mean relative error distance (MRED) vary by up to 1.95×, 4.40×, and 6.53×, respectively, across different multipliers. Furthermore, each multiplier exhibits distinct sensitivity patterns depending on the type of noise.
Abstract This work presents a resource-efficient architecture for quantum 5:2 compressors, addressing the prohibitively high T-count and circuit depth of exact arithmetic in the Noisy Intermediate-Scale Quantum (NISQ) regime. We implement a Hybrid Approximate-Exact synthesis methodology that fundamentally alters the logic synthesis path to prioritize quantum cost over strict logical equivalence. The proposed design intentionally isolates and excludes the fourth input bit (í µí±¥ 4)from the critical carry computation path during the initial approximation stage, significantly pruning the required Toffoli gate count. To mitigate the induced error, the proposed approach integrate a dedicated Error Correction Module (ECM) based on half-adder logic that realigns the significance weights of the intermediate sum and carry vectors. Validation via Qiskit Aer exhaustive statevector simulation confirms that this architecture achieves a superior Pareto frontier between circuit fidelity and arithmetic precision compared to fully exact baselines. The resulting topology minimizes decoherence-induced errors by reducing the gate depth, providing a viable arithmetic primitive for error-tolerant quantum algorithms.
Approximate quantum adders are gaining traction in NISQ-era computing for their potential to reduce quantum resource usage while preserving computational accuracy. In this work, we evaluate two 8-qubit hybrid approximate quantum adders that combine a 2-qubit approximate block, either a pass-through Copy Adder or a CNOT-based design, with a 6-qubit Cuccaro ripple-carry adder. Simulations are conducted using IBM's Qiskit framework under realistic noise models, including bit-flip, depolarizing, and thermal noise. Compared to the exact 8-bit Cuccaro adder, our designs reduce quantum cost and circuit depth by over 20 percent and achieve up to 79.3 percent higher output probability under noisy conditions. These results highlight the robustness and efficiency of approximate logic in noisy quantum environments and confirm its practicality for near-term quantum hardware.