Exploring Isolated Double-Quantum-Dot Detectors for Scalable Quantum Computing Architectures

Kalid Ulas

Published Jul 4, 2025• 0 citations

Abstract

With the progress made in advanced semiconductor manufacturing and in control and readout techniques, semiconductor based quantum computing has made significant progress in the past decade in both fidelities and coherence times. In view of scalability, an elementary computational unit that can retain key computational functionalities must be defined so that an array of such units can process information without excessive overhead. For quantum computation to proceed, not only should each qubit be able to perform operations in all dimensions about the Bloch sphere, but the detection of quantum states, either spin or charge, should also be fast, robust, and efficient. As the number of ancilla qubits needed for error correction scales with the number of computational qubits, there is a need for highly scalable, reproducible designs with a density sufficient to allow error correction. Finally, a cost-effective solution that maintains high compatibility with industry standards is needed to ensure industrialisation of such a unit. A compact arrangement eases scalability and allows a higher qubit density, while the versatility of such an architecture allows the circumvention of potentially defective or otherwise unusable portions of large-scale structures. This would allow minimising the footprint typically dedicated to error correction. This thesis proposes such an elementary unit in the form of a quadruple quantum-dot fabricated by a standard silicon-based Complementary metal- oxide-semiconductor (CMOS) process. Firstly, we show the flexibility of this device by reconfiguring the structure as a single-electron box (SEB) detector and as various double-quantum-dot (DQD) detector configurations. In all cases, we demonstrate a high fidelity fast readout exceeding 99.8% in 10µs. Finally, we discuss the ability for the DQD detector to exceed the performance of the SEB detector in an isolated quantum-dot array by thermalising with the lower temperature of T ≈42 ±2 mK as opposed to the electron temperature Te ≈139 ±4 mK.

DOI: 10.17863/cam.125326

Related papers

Combining multiplexed gate-based readout and isolated CMOS quantum dot arrays

Pierre Hamonic, Martin Nurizzo, Jayshankar Nath +15 more

Semiconductor quantum dot arrays are a promising platform to perform spin-based error-corrected quantum computation with large numbers of qubits. However, due to the diverging number of possible charge configurations combined with the limited sensitivity of large-footprint charge sensors, achieving single-spin occupancy in each dot in a growing quantum dot array is exceedingly complex. Therefore, to scale-up a spin-based architecture we must change how individual charges are readout and controlled. Here, we demonstrate single-spin occupancy of each dot in a foundry-fabricated array by combining two methods. 1/ Loading a finite number of electrons into the quantum dot array; simplifying electrostatic tuning by isolating the array from the reservoirs. 2/ Deploying multiplex gate-based reflectometry to dispersively probe charge tunneling and spin states without charge sensors or reservoirs. Our isolated arrays probed by embedded multiplex readout can be readily electrostatically tuned. They are thus a viable, scalable approach for spin-based quantum architectures. Large-footprint, low-sensitivity charge sensors hinder scaling semiconductor quantum dot arrays for quantum computation. Here the authors present a potentially scalable approach using multiplexed gate-based readout and operation in a foundry-fabricated quantum dot array, demonstrating single-electron occupancy.

arXiv:2410.02325Nature CommunicationsJul 9, 20254 citations

Scalable and high-sensitivity readout of silicon quantum devices

Simon Schaal

Quantum computing is predicted to provide unprecedented enhancements in computational power. A quantum computer requires implementation of a well-defined and controlled quantum system of many interconnected qubits, each defined using fragile quantum states. The interest in a spin-based quantum computer in silicon stems from demonstrations of very long spin-coherence times, high-fidelity single spin control and compatibility with industrial mass-fabrication. Industrial scale fabrication of the silicon platform offers a clear route towards a large-scale quantum computer, however, some of the processes and techniques employed in qubit demonstrators are incompatible with a dense and foundry-fabricated architecture. In particular, spin-readout utilises external sensors that require nearly the same footprint as qubit devices. In this thesis, improved readout techniques for silicon quantum devices are presented and routes towards implementation of a scalable and high-sensitivity readout architecture are investigated. Firstly, readout sensitivity of compact gate-based sensors is improved using a high-quality factor resonator and Josephson parametric amplifier that are fabricated separately from quantum dots. Secondly, an integrated transistor-based control circuit is presented using which sequential readout of two quantum dot devices using the same gate-based sensor is achieved. Finally, a large-scale readout architecture based on random-access and frequency multiplexing is introduced. The impact of readout circuit footprint on readout sensitivity is determined, showing routes towards integration of conventional circuits with quantum devices in a dense architecture, and a fault-tolerant architecture based on mediated exchange is introduced, capable of relaxing the limitations on available control circuit footprint per qubit. Demonstrations are based on foundry-fabricated transistors and few-electron quantum dots, showing that industry fabrication is a viable route towards quantum computation at a scale large enough to begin addressing the most challenging computational problems.

Jan 28, 20200 citations

Scalable Control and Measurement of Gate-Defined Quantum Dot Systems

James Colless

There is currently a worldwide effort towards the realisation of large-scale quantum computers that exploit quantum phenomena for information processing. While these computing systems could potentially redefine the technological landscape, harnessing quantum effects is challenging due to their inherently fragile nature and the experimentally demanding environments in which they arise. In order for quantum computation to be viable it is first necessary to demonstrate the operation of two-level quantum systems (qubits) which have long coherence times, can be quickly read out, and can be controlled with high fidelity. Focusing on these key requirements, this thesis presents four experiments towards scalable solid state quantum computing using gate-defined quantum dot devices based on gallium arsenide (GaAs) heterostructures. The first experiment investigates a phonon emission process that limits the charge coherence in GaAs and potentially complicates the microwave control of multi-qubit devices. We show that this microwave analogy to Raman spectroscopy can provide a means of detecting the unique phonon spectral density created by a nanoscale device. Experimental results are compared to a theoretical model based on a non-Markovian master equation and approaches to suppressing electron-phonon coupling are discussed. The second experiment demonstrates a technique involving in-situ gate electrodes coupled to lumped-element resonators to provide high-bandwidth dispersive read-out of the state of a double quantum dot. We characterise the charge sensitivity of this method in the few-electron regime and benchmark its performance against quantum point contact charge sensors. The third experiment implements a low-loss, chip-level frequency multiplexing scheme for the readout of scaled-up spin qubit arrays. Dispersive gate-sensing is realised in combination with charge detection based on two radio frequency quantum point contacts to perform multiplexed readout of a double quantum dot in the few-electron regime. Demonstration of a 10-channel multiplexing device is achieved and limitations in scaling spin qubit readout to large numbers using multiplexed channels discussed. The final experiment ties previously presented results together by realising a micro-architecture for controlling and reading out qubits during the execution of a quantum algorithm. The basic principles of this architecture are demonstrated via the manipulation of a semiconductor qubit using control pulses that are cryogenically routed using a high-electron mobility transistor switching matrix controlled by a field programmable gate array. Finally, several technical results are also presented including the development of printed circuit board solutions to allow the high-frequency measurement of nanoscale devices at cryogenic temperatures and the design of on-chip interconnects used to suppress electromagnetic crosstalk in high-density spin qubit device architectures.

Oct 10, 20160 citations

Silicon CMOS architecture for a spin-based quantum computer

Menno Veldhorst, H. G. J. Eenink, C. H. Yang +1 more

Recent advances in quantum error correction codes for fault-tolerant quantum computing and physical realizations of high-fidelity qubits in multiple platforms give promise for the construction of a quantum computer based on millions of interacting qubits. However, the classical-quantum interface remains a nascent field of exploration. Here, we propose an architecture for a silicon-based quantum computer processor based on complementary metal-oxide-semiconductor (CMOS) technology. We show how a transistor-based control circuit together with charge-storage electrodes can be used to operate a dense and scalable two-dimensional qubit system. The qubits are defined by the spin state of a single electron confined in quantum dots, coupled via exchange interactions, controlled using a microwave cavity, and measured via gate-based dispersive readout. We implement a spin qubit surface code, showing the prospects for universal quantum computation. We discuss the challenges and focus areas that need to be addressed, providing a path for large-scale quantum computing.

arXiv:1609.09700Nature CommunicationsNov 20, 2017397 citations

Integrated multiplexed microwave readout of silicon quantum dots in a cryogenic CMOS chip

Andrea Ruffino, Tsung-Yeh Yang, John Michniewicz +3 more

Solid-state quantum computers require classical electronics to control and readout individual qubits and to enable fast classical data processing [1-3]. Integrating both subsystems at deep cryogenic temperatures [4], where solid-state quantum processors operate best, may solve some major scaling challenges, such as system size and input/output (I/O) data management [5]. Spin qubits in silicon quantum dots (QDs) could be monolithically integrated with complementary metal-oxide-semiconductor (CMOS) electronics using very-large-scale integration (VLSI) and thus leveraging over wide manufacturing experience in the semiconductor industry [6]. However, experimental demonstrations of integration using industrial CMOS at mK temperatures are still in their infancy. Here we present a cryogenic integrated circuit (IC) fabricated using industrial CMOS technology that hosts three key ingredients of a silicon-based quantum processor: QD arrays (arranged here in a non-interacting 3x3 configuration), digital electronics to minimize control lines using row-column addressing and analog LC resonators for multiplexed readout, all operating at 50 mK. With the microwave resonators (6-8 GHz range), we show dispersive readout of the charge state of the QDs and perform combined time- and frequency-domain multiplexing, enabling scalable readout while reducing the overall chip footprint. This modular architecture probes the limits towards the realization of a large-scale silicon quantum computer integrating quantum and classical electronics using industrial CMOS technology.

arXiv:2101.08295Jan 20, 20217 citations

Silicon CMOS architecture for a spin-based quantum computer

Menno Veldhorst, H. G. J. Eenink, Chih Hwan Yang +1 more

Abstract Recent advances in quantum error correction codes for fault-tolerant quantum computing and physical realizations of high-fidelity qubits in multiple platforms give promise for the construction of a quantum computer based on millions of interacting qubits. However, the classical-quantum interface remains a nascent field of exploration. Here, we propose an architecture for a silicon-based quantum computer processor based on complementary metal-oxide-semiconductor (CMOS) technology. We show how a transistor-based control circuit together with charge-storage electrodes can be used to operate a dense and scalable two-dimensional qubit system. The qubits are defined by the spin state of a single electron confined in quantum dots, coupled via exchange interactions, controlled using a microwave cavity, and measured via gate-based dispersive readout. We implement a spin qubit surface code, showing the prospects for universal quantum computation. We discuss the challenges and focus areas that need to be addressed, providing a path for large-scale quantum computing.

Jan 1, 2017166 citations