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Discrete Depth Stabilization in Noisy Quantum Hardware: An Information-Theoretic Study Using Fixed-Shot Phase-Lock Circuits

JUNICHI FUJIKI

Published Dec 25, 2025• 0 citations
Publisher

Abstract

This repository contains the experimental and analytical materialsassociated with the manuscript: “Discrete Depth Stabilization in Noisy Quantum Hardware:An Information-Theoretic Study Using Fixed-Shot Phase-Lock Circuits” The study reports experimental evidence from superconducting quantum hardwareshowing non-monotonic performance as a function of circuit depth underfixed-shot constraints. In particular, discrete depth regimes are identifiedin which phase discrimination efficiency remains high despite increasedhardware noise exposure. All experiments were performed on publicly accessible IBM Quantum hardware.Due to the stochastic and time-dependent nature of quantum device noise,exact numerical reproduction is not expected; however, all circuitconstructions and analysis procedures are fully documented ---[Revision Note for v2.0 (September 2026)]- Clarified notation between circuit repetition steps (N_step in [1, 41]) and total physical gate depth (N = 2 * N_step in [2, 82]).- Harmonized figure captions with physical depth metrics to prevent ambiguity. quantum computingNISQquantum noisecircuit depthphase estimationinformation theoryIBM Quantum

DOI
10.5281/zenodo.18050831

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We experimentally study error mitigation and finite-shot sampling on superconducting quantum hardware under a constrained execution budget. The study combines calibration-aware qubit selection, circuit-depth scaling, zero-noise extrapolation, dynamical decoupling, readout-error mitigation, and repeated-shot estimation on an IBM Quantum processor. Experiments are organized across ideal simulation, noise-model simulation, and physical-device execution to separate sampling uncertainty from device-induced error. We investigate how mitigation performance changes with circuit depth, effective noise scale, qubit connectivity, and measurement budget, and quantify accuracy using expectation-value error, mean-squared error, statistical uncertainty, and mitigation gain. A fixed hardware-execution budget is used to evaluate shot allocation strategies and repeated measurements without relying on unlimited sampling. The resulting analysis provides a hardware-aware characterization of when mitigation improves expectation-value estimation and when finite-shot fluctuations offset the benefit of additional mitigation overhead. The implementation uses contemporary Qiskit and IBM Quantum Runtime workflows and is designed to provide reproducible experimental evidence for error-mitigation studies on current quantum processors.
Quantum hardware is steadily improving, but near-term quantum devices remain limited by noise and circuit depth. This motivates measurement protocols that can use shallow-depth circuits while remaining robust to experimental errors. In this work, we study the advantages of shallow randomized measurements over non-entangling single-qubit measurements for learning properties of quantum states. Although shallow measurements have shown advantages in selected applications, their usefulness across different learning tasks has not been systematically understood. Here, we develop a theoretical framework based on Clifford ensembles that incorporates shallow measurements into derandomized measurements, multi-shot protocols, common randomized measurements, error-mitigated estimators, and hybrid quantum-classical learning. Finally, we validate these results on IBM quantum hardware in experiments with up to 40 qubits and 46 layers of two-qubit gates. These results indicate that shallow-depth measurements can provide practical benefits on noisy quantum devices.
This paper analyzes why increased QAOA circuit depth does not improve sampling outcomes on contemporary superconducting hardware. Using a fixed experimental corpus of 60 fault tree QUBO instances spanning problem sizes N = 12, 16, 20, 24, 28, and 32, we evaluate ibm_torino executions at depths p = 1 and p = 2 with 8,192 shots per circuit, for 120 circuit publications total. We connect canonical distribution metrics from the companion limits study—including maximum probability, Shannon entropy, and top-10 mass—to circuit-level indicators derived from archived circuit renderings. Across all problem sizes, increasing depth from p = 1 to p = 2 does not yield consistent concentration gains. The median improvement is exactly zero for all three metrics; mean changes are three orders of magnitude below the shot-noise scale. Entropy remains close to the theoretical maximum of log₂(8192) ≈ 13 bits, indicating noise-dominated operation. Circuit-level analysis reveals that all 10 circuits within each job share identical structure, with no depth-dependent structural diversification observed. These results support a mechanism-level interpretation: additional depth increases circuit exposure to hardware noise without producing usable structure in the sampled distribution under the studied compilation and device conditions. This paper provides audit-ready tables and figures linking depth study outcomes to circuit-level characteristics while keeping claims strictly within empirical behavior for this backend, circuit family, and execution configuration.
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This study examines how noise affects the reliability of quantum circuits through two complementary approaches: a controlled simulation using Qiskit Aer and an execution study on real IBM Quantum hardware. In simulation, five noise models (bit-flip, phase-flip, depolarizing, readout, and thermal-relaxation) were applied to a parameterized benchmark circuit across varying qubit counts, circuit depths, and noise strengths, producing 6,000 experimental observations. Success probability declined substantially as qubit count and circuit depth increased, with bit-flip, phase-flip, and depolarizing noise degrading performance far more severely (mean success probabilities of 0.597, 0.580, and 0.607) than readout noise (0.917) or thermal-relaxation noise (0.982). The same benchmark circuit was then executed on the ibm_marrakesh processor across 150 hardware runs (150,000 shots). Hardware performance remained consistently high (mean success probability 0.992), declining with qubit count (0.998 at two qubits to 0.986 at six) but showing little sensitivity to circuit depth. These results indicate that controlled noise mechanisms and real hardware degrade circuit performance through different dynamics, with implications for interpreting simulated noise models relative to physical device behavior.
The quantum approximate optimization algorithm (QAOA) is a promising quantum-classical hybrid technique to solve combinatorial optimization problems in near-term gate-based noisy quantum devices. In QAOA, the objective is a function of the quantum state, which itself is a function of the gate parameters of a multi-level parameterized quantum circuit (PQC). A classical optimizer varies the continuous gate parameters to generate distributions (quantum state) with significant support to the optimal solution. Even at the lowest circuit depth, QAOA offers non-trivial provable performance guarantee which is expected to increase with the circuit depth. However, the existing analysis fails to consider non-idealities in the qubit quality i.e., short lifetime and imperfect gate operations in realistic quantum hardware. In this article, we investigate the impact of various noise sources on the performance of QAOA both in simulation and on a real quantum computer from IBM. Our analyses indicate that the optimal number of stages (p-value) for any QAOA instance is limited by the noise characteristics (gate error, coherence time, etc.) of the target hardware as opposed to the current perception that higher-depth QAOA will provide monotonically better performance for a given problem compared to the low-depth implementations.