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Fault-Tolerant Quantum Architectures Based on Erasure Qubits:Optimizing Code Conversion for Biased Noise Environments

Anand Thipperudra, Randeep Singh, Shambhulinga Aralekallu

Published Jan 1, 2025• 0 citations
Publisher
DOI
10.2139/ssrn.5750803

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The overhead of quantum error correction (QEC) poses a major bottleneck for realizing fault-tolerant computation. To reduce this overhead, we exploit the idea of erasure qubits, relying on an efficient conversion of the dominant noise into erasures at known locations. We start by introducing a formalism for QEC schemes with erasure qubits and express the corresponding decoding problem as a matching problem. Then, we propose and optimize QEC schemes based on erasure qubits and the recently introduced Floquet codes. Our schemes are well suited for superconducting circuits, being compatible with planar layouts. We numerically estimate the memory thresholds for the circuit noise model that includes spreading (via entangling operations) and imperfect detection of erasures. Our results demonstrate that, despite being slightly more complex, QEC schemes based on erasure qubits can significantly outperform standard approaches.
Fast and high fidelity shuttling of spin qubits has been demonstrated in semiconductor quantum dot devices. Several architectures based on shuttling have been proposed; it has been suggested that singlet-triplet (dual-spin) qubits could be optimal for the highest shuttling fidelities. Here we present a fault-tolerant framework for quantum error correction based on such dual-spin qubits, establishing them as a natural realisation of erasure qubits within semiconductor architectures. We introduce a hardware-efficient leakage-detection protocol that automatically projects leaked qubits back onto the computational subspace, without the need for measurement feedback or increased classical control overheads. When combined with the XZZX surface code and leakage-aware decoding, we demonstrate a twofold increase in the error correction threshold and achieve orders-of-magnitude reductions in logical error rates. This establishes the singlet-triplet encoding as a practical route toward high-fidelity shuttling and erasure-based, fault-tolerant quantum computation in semiconductor devices.
We present a fault-tolerant universal quantum computing architecture based on a code concatenation of biased-noise qubits and the parity architecture. The parity architecture can be understood as a low-density parity-check code tailored specifically to obtain any desired logical connectivity from nearest-neighbor physical interactions. The code layout can be dynamically adjusted to algorithmic requirements on the fly. This allows for implementations with any desired code distance with a universal set of fault-tolerant gates. In addition to the previously explored toolsets for concatenated cat codes, our approach features parallelizable interactions between arbitrary sets of qubits by directly addressing the parity qubits in the code. The proposed scheme supports codes with lower physical qubit overhead than the repetition code at the same code distances, while requiring only weight-3 and weight-4 stabilizers and nearest-neighbor connectivity on a two-dimensional square lattice.