IEEE Region 10 Symposium (TENSYMP)

Efficient Reversible Logic Design for Quantum Computing: A Novel 4-Bit LFSR Approach

N. Neelima, K. Nishanth Rao, Aruru Sai Kumar, Jayaram Komanduri, Suresh Kemmasaram, Sangeetha Laxmi Adepu

Published Sep 27, 2024• 0 citations

Abstract

Reversible logic gates are critical components in the field of quantum computing and low-power digital circuits, as they allow for the retrieval of input states from output states without any loss of information. This property ensures minimal energy dissipation, aligning with the principles of reversible computation. Their applications extend to quantum computing, cryptographic systems, and error detection and correction mechanisms. This paper presents a novel design for a Reversible D Flip-Flop (RDFF) and a 4-bit Linear Feedback Shift Register (LFSR). The Linear Feedback Shift Register (LFSR) is built utilizing four Register-Driven D Flip-Flops (RDFFs) and a feedback mechanism that incorporates a Feynman Gate. This configuration successfully showcases the capacity to generate pseudo-random sequences. The LFSR design demonstrates a 10% improvement in Total Reversible Logic Implementation Cost and 27% enhancement in quantum cost, making it a more resource-efficient option for reversible computing. This work makes a valuable contribution to the field of reversible computing by offering efficient designs for essential components.

DOI: 10.1109/tensymp61132.2024.10752203

Related papers

An Efficient Priority Encoder Design Utilizing Reversible Logic Techniques

Aruru Sai Kumar, Kiran Kumar Godugu, Bhoomika Bobbiligama +3 more

Reversible logic gates are recognized for their innate energy efficiency, as they do not waste energy through information loss during computations. They hold a pivotal role in quantum computing due to their bijective nature, which is essential for crafting quantum algorithms and circuits. Their resilience to faults makes reversible gates well-suited for constructing robust and dependable digital systems, particularly in critical safety applications. This project centers on crafting and executing a 4-to-2 priority encoder using reversible logic gates. A priority encoder is a type of circuit that allows several input lines to be converted into a binary code that is a reflection of the current input that is given the highest priority. The design incorporates three Feynman gates, two Toffoli gates, and a BJN gate, showcasing the effectiveness of reversible logic gates in creating efficient digital circuits. The design demonstrates superior performance in terms of quantum cost in comparison to other encoder architectures, with a decrease in quantum cost that is 33.3% lower than the other architectures.

International Conference on Electrical Energy Systems (ICEES)Aug 22, 20242 citations

Quantum Cost-Efficient Design of Synchronous Reversible Shift Registers using Reversible Logic

Shivangi Gupta, Rahul Kumar, Somesh Kumar

Reversible circuits are one of the most promising technologies for replicating inputs from recorded outputs, and it results in lower power dissipation. All gates such as NAND, AND, OR, NOR etc. are irreversible in nature and consume energy during calculations. Similar to quantum circuits, reversible logic circuitry does not consume energy throughout the calculation cycle. Due to this, reversible circuits can be used for quantum communication and other low-power applications. Registers are one of the most important storage components utilised in a wide range of real-time operations. Using expressions of exclusive-or sum of products (ESOP) and modified Fredkin gates, this work presents a novel way for creating a quantum cost-effective universal register circuit. The designed universal register circuitry for left and right shifts are tested in the Xilinx Vivado simulator to ensure that they are functional and logically correct. The proposed universal registers outperform the standard designs in terms of garbage outputs (GO), quantum cost (QC), gate count (GC), and Ancilla inputs (AI), according to the comparative analysis.

IEEE Bombay Section Signature Conference (IBSSC)Nov 18, 20212 citations

MATHEMATICAL MODELING AND SYNTHESIS OF REVERSIBLE CRYPTOGRAPHIC LOGIC

Premanand K. Kadbe, Shriram D. Markande

Reversible logic has emerged as a pivotal area of study in the realm of computing, primarily due to its potential for energy efficient computation. Reversible cryptographic logic is an important area in applications such as signal processing, nanotechnology, bio-information, low power and lightweight applications and cyber security. The area and power constraints are as well taken into account of cryptographic protocol. In addition, intruders and hackers may snoop or modify identified data sent over the channel. Reversible cryptographic logic can be installed to prevent this situation. For this there is a need to study with optimal metrics viz. quantum cost, area, and performance. The feedback shift register is used for encryption and decryption techniques in a symmetrical way. This paper presents a comprehensive mathematical modeling framework for reversible logic circuits, focusing on the fundamental principles that govern their operation. We explore various reversible gate designs, analyze their operational efficiencies, and derive mathematical expressions that describe their behavior. By employing tools from combinatorial optimization and linear algebra, we investigate the trade-offs between circuit complexity and energy consumption. The modeling framework is validated through simulation results, which illustrate the advantages of reversible logic over traditional irreversible circuits in specific applications. Our findings highlight the significance of reversible logic in advancing quantum computing, low power digital systems and sustainable computing paradigms.

Feb 22, 20250 citations

An Efficient 8-Bit Adder/Subtractor Design Utilizing Reversible Logic Techniques

Aruru Sai Kumar, K Charan Kumar, U. Siddhesh +3 more

Reversible logic gates are essential for quantum computing and low-power digital circuits as they enable the recovery of input signals from output signals, thereby minimizing energy dissipation. This field of study has become a leading-edge research domain, driving innovative advancements focused on optimizing resource efficiency. This study introduces an efficient 8-bit adder/subtractor circuit designed using Feynman and HNG reversible logic gates. The circuit incorporates a control bit (M) that dictates its operational mode: M=0 signifies addition functionality, while M=1 indicates subtraction functionality. This dual functionality is achieved with substantial efficiency enhancements, as evidenced by a 22% decrease in quantum cost compared to traditional methods. The design also boasts a reduced total reversible logic implementation cost, underscoring its efficiency. Validation and simulation of the reversible 8-bit adder/subtractor circuit are conducted using Xilinx Vivado 2022.2 software

International Conference on Electrical Energy Systems (ICEES)Aug 22, 20240 citations

Design of quantum cost efficient 4-bit reversible universal shift register

Heranmoy Maity, Arindam Biswas, Anup Kr. Bhattacherjee +1 more

This paper proposed the design of quantum cost efficient 4-bit reversible universal shift register(RUSR) using existing reversible logic gates. The proposed design is very useful in quantum computing due to its low quantum cost, less no. of reversible logic gate and low garbage outputs. The quantum cost(QC), garbage output(GO), number of gates are respectively 68, 20 and 16 for proposed work.

Devices for Integrated Circuit (DevIC)Mar 1, 20179 citations

DESIGN AND OPTIMIZATION OF SINGLE AND MULTIPLE-LOOP REVERSIBLE AND QUANTUM FEEDBACK CIRCUITS

MAJID MOHAMMADI, Aliakbar Niknafs, Mohammad Eshghi +1 more

The majority of work in reversible logic circuits has been limited to combinational logic. Researchers are now beginning to suggest designs for sequential circuits. In this paper we propose a new method to design and optimize feedback reversible logic circuits and a specific group of quantum logic circuits based on the reversible state transition table and genetic algorithms (GA). To show the efficiency of the proposed method, some reversible sequential elements such as D and T flip-flops (FFs), with and without clock and reset, and edge triggered FFs are designed. We have also extended our method to multiple loop feedback circuits. The proposed circuits are highly optimized using a GA synthesis tool that allows don't care values. Some of the designs in this paper are presented in other papers; however, the comparisons show that the quantum cost and number of garbage inputs/outputs are reduced efficiently by our method.

Journal of Circuits Systems and ComputersMay 1, 20128 citations