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International Conference on Supercomputing

Minimizing Coherence Errors via Dynamic Decoupling

Soheil Khadirsharbiyani, Movahhed Sadeghi, Mostafa Eghbali Zarch, Mahmut Kandemir

Published May 30, 2024• 2 citations
Publisher

Abstract

Quantum computing in the Noisy Intermediate-Scale Quantum (NISQ) era faces significant challenges due to the limitations in quantum gate fidelity and elevated error rates, which impede the successful execution of large-scale quantum circuits. One major source of errors in quantum computing is ’coherence errors’, which arise from the idle time during circuit execution. Specifically, factors such as uneven gate operations, hardware limitations, and qubit connectivity constraints collectively contribute to the formation of ’holes’ in quantum circuits, leading to ’idle qubits’. These idle periods, in turn, increase noise and error rates, thus negatively impacting the overall reliability of quantum circuits’ outputs.

DOI
10.1145/3650200.3656617

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Quantum computing in the Noisy Intermediate-Scale Quantum (NISQ) era faces significant challenges due to the limitations in quantum gate fidelity and elevated error rates, which impede the successful execution of large-scale quantum circuits. One major source of errors in quantum computing is ’coherence errors’, which arise from the idle time during circuit execution. Specifically, factors such as uneven gate operations, hardware limitations, and qubit connectivity constraints collectively contribute to the formation of ’holes’ in quantum circuits, leading to ’idle qubits’. These idle periods, in turn, increase noise and error rates, thus negatively impacting the overall reliability of quantum circuits’ outputs.
In the current noisy intermediate-scale quantum (NISQ) Era, Quantum Computing faces significant challenges due to noise, which severely restricts the application of computing complex algorithms. Superconducting quantum chips, one of the pioneer quantum computation technologies, introduce additional noise when moving qubits to adjacent locations for operation on designated two-qubit gates. The current compilers rely on decision models that either count the swap gates or multiply the gate errors when choosing swap paths at the routing stage. Our research has unveiled the overlooked situations for error propagations through the circuit, leading to accumulations that may affect the final output.
Despite the current progress in quantum computing, the reliability of quantum computers is very challenging. Near-term quantum computers referred to as Noisy Intermediate-Scale Quantum (NISQ) computers are expected to operate in the presence of errors. To run a quantum circuit on a NISQ computer, the circuit should be mapped to satisfy the physical constraints of the quantum architecture. The mapping process takes into account the error rates of the quantum hardware. It selects physical qubits and their movements, which minimize the circuit error rates. The output of the quantum circuit can be obtained through several runs on NISQ computers.
Coherent errors, and especially those that occur in correlation among a set of qubits, are detrimental for large-scale quantum computing. Correlations in noise can occur as a result of spatial and temporal configurations of instructions executing on the quantum processor. In this paper, we perform a detailed experimental characterization of many of these error sources, and theoretically connect them to the physics of superconducting qubits and gate operations. Equipped with this knowledge, we devise compiler strategies to suppress these errors using dynamical decoupling or error compensation into the rest of the circuit. Importantly, these strategies are successful when the context at each layer of computation is taken into account: how qubits are connected, what crosstalk terms exist on the device, and what gates or idle periods occur in that layer. Our context-aware compiler thus suppresses some dominant sources of error, making further error mitigation or error correction substantially less expensive. For example, our experiments show an increase of 18.5%\mathbf{1 8. 5 \%}18.5% in layer fidelity for a candidate 10 -qubit circuit layer compared to context-unaware suppression. Owing to the exponential nature of error mitigation, these improvements due to error suppression translate to several orders of magnitude reduction of sampling overhead for a circuit consisting of a moderate number of layers.
Quantum computing promises exponential speedups for an important class of problems.While quantum computers with few dozens of qubits have been demonstrated, these machines suffer from a high rate of gate errors.Such machines are operated in the Noisy Intermediate Scale Quantum (NISQ) mode of computing where the output of the machine can be erroneous.In this talk, I will discuss some of our recent work that aims to improve the reliability of NISQ computers by developing software techniques to mitigate hardware errors.Our first work exploits the variability in the error rates of qubits to steer more operations towards qubits with lower error rates and avoid qubits that are error-prone.Our second work looks at executing different versions of the programs each crafted to cause diverse mistakes so that the machine becomes less vulnerable to correlated errors.Our third work looks at exploiting the state-dependent bias in measurement errors (state 1 is more error-prone than state 0) and dynamically flips the state of the qubit to perform the measurement in the stronger state.We perform our evaluations on real quantum machines from IBM and demonstrate significant improvement in the overall system reliability.Finally, I will also briefly discuss the hardware aspect of designing largescale quantum computers, including cryogenic processor and cryogenic memory system.
Optimizing quantum circuits is a critical step in the design and deployment of efficient, scalable, and fault tolerant quantum algorithms. As quantum circuits grow in depth and complexity, they often accumulate redundant or unnecessary gate operations. These redundancies not only increase the resource requirements of the circuit but also exacerbate one of the most pressing challenges in quantum computing—quantum noise. Unlike classical noise, quantum noise can irreversibly disturb the fragile quantum state, leading to decoherence and erroneous computational outcomes.
Quantum systems have the potential to demonstrate significant computational advantage, but current quantum devices suffer from the rapid accumulation of error that prevents the storage of quantum information over extended periods. The unintentional coupling of qubits to their environment and each other adds significant noise to computation, and improved methods to combat decoherence are required to boost the performance of quantum algorithms on real machines. While many existing techniques for mitigating error rely on adding extra gates to the circuit [ 13 , 20 , 56 ], calibrating new gates [ 50 ], or extending a circuit’s runtime [ 32 ], this article’s primary contribution leverages the gates already present in a quantum program without extending circuit duration. We exploit circuit slack for single-qubit gates that occur in idle windows, scheduling the gates such that their timing can counteract some errors. Spin-echo corrections that mitigate decoherence on idling qubits act as inspiration for this work. Theoretical models, however, fail to capture all sources of noise in Noisy Intermediate Scale Quantum devices, making practical solutions necessary that better minimize the impact of unpredictable errors in quantum machines. This article presents TimeStitch: a novel framework that pinpoints the optimum execution schedules for single-qubit gates within quantum circuits. TimeStitch, implemented as a compilation pass, leverages the reversible nature of quantum computation to boost the success of circuits on real quantum machines. Unlike past approaches that apply reversibility properties to improve quantum circuit execution [ 35 ], TimeStitch amplifies fidelity without violating critical path frontiers in either the slack tuning procedures or the final rescheduled circuit. On average, compared to a state-of-the-art baseline, a practically constrained TimeStitch achieves a mean 38% relative improvement in success rates, with a maximum of 106%, while observing bounds on circuit depth. When unconstrained by depth criteria, TimeStitch produces a mean relative fidelity increase of 50% with a maximum of 256%. Finally, when TimeStitch intelligently leverages periodic dynamical decoupling within its scheduling framework, a mean 64% improvement is observed over the baseline, relatively outperforming stand-alone dynamical decoupling by 19%, with a maximum of 287%.