Achieving high-precision quantum computation requires effective suppression of idling errors that occur when qubits remain inactive during waiting periods within a quantum circuit. Conventional mitigation techniques, such as dynamical decoupling, suppress decoherence by periodically refreshing quantum states through the insertion of additional control gates. In this paper, we propose an alternative approach that suppresses idling errors through quantum circuit scheduling without introducing any additional gate operations. By appropriately adjusting the execution timing of quantum gates with scheduling flexibility, we demonstrate through both numerical simulations and hardware experiments that the overall computational accuracy can be significantly influenced and, in many cases, improved. In addition, we analytically derive the density-matrix evolution under idling noise and provide a theoretical framework that explains the observed behavior.
Achieving high-precision quantum computation requires effective suppression of idling errors that occur when qubits remain inactive during waiting periods within a quantum circuit. Conventional mitigation techniques, such as dynamical decoupling, suppress decoherence by periodically refreshing quantum states through the insertion of additional control gates. In this paper, we propose an alternative approach that suppresses idling errors through quantum circuit scheduling without introducing any additional gate operations. By appropriately adjusting the execution timing of quantum gates with scheduling flexibility, we demonstrate through both numerical simulations and hardware experiments that the overall computational accuracy can be significantly influenced and, in many cases, improved. In addition, we analytically derive the density-matrix evolution under idling noise and provide a theoretical framework that explains the observed behavior.
Quantum systems have potential to demonstrate significant computational advantage, but current quantum devices suffer from the rapid accumulation of error that prevents the storage of quantum information over extended periods. The unintentional coupling of qubits to their environment and each other adds significant noise to computation, and improved methods to combat decoherence are required to boost the performance of quantum algorithms on real machines. While many existing techniques for mitigating error rely on adding extra gates to the circuit, calibrating new gates, or extending a circuit's runtime, this paper's primary contribution leverages the gates already present in a quantum program without extending circuit duration. We exploit circuit slack for single-qubit gates that occur in idle windows, scheduling the gates such that their timing can counteract some errors. Spin-echo corrections that mitigate decoherence on idling qubits act as inspiration for this work. Theoretical models, however, fail to capture all sources of noise in NISQ devices, making practical solutions necessary that better minimize the impact of unpredictable errors in quantum machines. This paper presents TimeStitch: a novel framework that pinpoints the optimum execution schedules for single-qubit gates within quantum circuits. TimeStitch, implemented as a compilation pass, leverages the reversible nature of quantum computation to boost the success of circuits on real quantum machines.
Dynamic quantum circuits integrate mid-circuit measurements and feed-forward operations to enable real-time classical processing and conditional quantum logic. These capabilities are central to key quantum protocols such as quantum error correction, and have recently demonstrated significant potential for reducing quantum resources, including circuit depth and gate count, across a range of applications. However, executing dynamic circuits on real quantum hardware introduces a critical trade-off: while resource requirements decrease, circuit fidelity degrades due to high error rates of mid-circuit measurements, as well as the decoherence errors accumulated during the extended idle periods introduced by both mid-circuit measurements and feed-forward operations. In this paper, we systematically investigate the impact of standard error mitigation techniques on dynamic circuit applications pertaining to Hamiltonian simulation and ground state estimation of physically relevant systems like the Heisenberg model. We explore dynamical decoupling (DD) as a strategy to suppress decoherence and crosstalk errors during idle windows introduced by mid-circuit measurements and feed-forward delays, and also examine error mitigation via zero-noise extrapolation (ZNE). Through experiments conducted on IBM quantum hardware, we benchmark effective combinations of these strategies that maximize the practical benefits of dynamic quantum circuits in these applications. We demonstrate that a combination of DD and ZNE is effective in mitigating the errors introduced during mid-circuit measurements and feed-forward operations, as well as the errors arising from faulty measurements. This approach yields a energy gap improvement of at least 60% in ground state estimation and reduces observed error of time-evolved states by up to 99% for the Ising model and up to 20% for the Heisenberg model.
The fidelity of applications on near-term quantum computers is limited by hardware errors. In addition to errors that occur during gate and measurement operations, a qubit is susceptible to idling errors, which occur when the qubit is idle and not actively undergoing any operations. To mitigate idling errors, prior works in the quantum devices community have proposed Dynamical Decoupling (DD), that reduces stray noise on idle qubits by continuously executing a specific sequence of single-qubit operations that effectively behave as an identity gate. Unfortunately, existing DD protocols have been primarily studied for individual qubits and their efficacy at the application-level is not yet fully understood.
Quantum computing in the Noisy Intermediate-Scale Quantum (NISQ) era faces significant challenges due to the limitations in quantum gate fidelity and elevated error rates, which impede the successful execution of large-scale quantum circuits. One major source of errors in quantum computing is ’coherence errors’, which arise from the idle time during circuit execution. Specifically, factors such as uneven gate operations, hardware limitations, and qubit connectivity constraints collectively contribute to the formation of ’holes’ in quantum circuits, leading to ’idle qubits’. These idle periods, in turn, increase noise and error rates, thus negatively impacting the overall reliability of quantum circuits’ outputs.
Undoubtedly, quantum computing offers valuable acceleration for solving intricate problems. One of the primary hurdles lies in executing large-scale quantum applications on backend machines. Qubit noise, among other factors, dramatically influences the execution process. Implementing effective scheduling techniques for quantum circuits is crucial for practical quantum computing and preventing excessive waiting times. The quantum realm is distinct from classical computing in terms of optimization, performance, utilization, and waiting periods. Consequently, the parameters and components of quantum circuit scheduling diverge from those of classical computing. This paper presents Quantum Noise Mitigation: Introducing the Robust Quantum Circuit Scheduler for Enhanced Fidelity and Throughput, a straightforward yet effective scheduling framework and policy that enhances noise resilience, throughput, and the fidelity of quantum circuits. Drawing inspiration from classical methods, our scheduling approach incorporates additional constraints tailored for quantum logic. The outcome demonstrates a substantial improvement in fidelity and resource management, which is vital for real-world quantum applications.
Quantum systems have the potential to demonstrate significant computational advantage, but current quantum devices suffer from the rapid accumulation of error that prevents the storage of quantum information over extended periods. The unintentional coupling of qubits to their environment and each other adds significant noise to computation, and improved methods to combat decoherence are required to boost the performance of quantum algorithms on real machines. While many existing techniques for mitigating error rely on adding extra gates to the circuit [ 13 , 20 , 56 ], calibrating new gates [ 50 ], or extending a circuit’s runtime [ 32 ], this article’s primary contribution leverages the gates already present in a quantum program without extending circuit duration. We exploit circuit slack for single-qubit gates that occur in idle windows, scheduling the gates such that their timing can counteract some errors. Spin-echo corrections that mitigate decoherence on idling qubits act as inspiration for this work. Theoretical models, however, fail to capture all sources of noise in Noisy Intermediate Scale Quantum devices, making practical solutions necessary that better minimize the impact of unpredictable errors in quantum machines. This article presents TimeStitch: a novel framework that pinpoints the optimum execution schedules for single-qubit gates within quantum circuits. TimeStitch, implemented as a compilation pass, leverages the reversible nature of quantum computation to boost the success of circuits on real quantum machines. Unlike past approaches that apply reversibility properties to improve quantum circuit execution [ 35 ], TimeStitch amplifies fidelity without violating critical path frontiers in either the slack tuning procedures or the final rescheduled circuit. On average, compared to a state-of-the-art baseline, a practically constrained TimeStitch achieves a mean 38% relative improvement in success rates, with a maximum of 106%, while observing bounds on circuit depth. When unconstrained by depth criteria, TimeStitch produces a mean relative fidelity increase of 50% with a maximum of 256%. Finally, when TimeStitch intelligently leverages periodic dynamical decoupling within its scheduling framework, a mean 64% improvement is observed over the baseline, relatively outperforming stand-alone dynamical decoupling by 19%, with a maximum of 287%.