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Design and development of a surface-electrode ion trap for optical frequency metrology

Clément Lacroûte, Lucas Groult, Bachir Achi +5 more

Aug 25, 20180 citations

Fast Ion Transport in a Surface Electrode Trap

Susanna Todaro, D. H. Slichter, David J. Wineland +2 more

Bulletin of the American Physical SocietyMay 28, 20190 citations

Surface Electrode Ion Trap Developed and Improvement by Oxide- First- Metal-Last Approach for High Performance Quantum Computing

H.Y. Li, Wen Wei Seit, Hwang Gilho +4 more

Oxide-First-Metal-Last (OFML) approach was developed and implemented for surface electrode ion trap after different fabrication approaches evaluation. Surface electrode ion trap was fabricated on the high resistivity wafer after lithographic process optimization and metal electrode corrosion troubleshooting. Less than 10E-12A leakage current between surface electrodes was achieved when swept voltage from -100V to 100V.

IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)Jul 20, 20203 citations

Analytical methods for design of surface-electrode ion traps

Janus H. Wesenberg, Jason Amini, R. B. Blakestad +11 more

Bulletin of the American Physical SocietyJun 7, 20071 citation

Surface-Electrode Ion Trap Development

Timur Abbasov, Sergei A. Zibrov, I. Sherstov

We present a segmented linear surface electrode ion trap design that can be used for various applications in optical clocks and quantum computation based on trapped 171Yb+ ions. Our simulations show that calculated trap depth can reach up to several electronvolts and that the pseudopotential minimum of the trap is located above the trap surface at a distance greater than 80 μm. The described pseudopotential simulations and calculations of different trap parameters can be used to design the planar trap with required parameters. This design could be scaled to store a long chain of ions and used for quantum logic applications as well.We present a segmented linear surface electrode ion trap design that can be used for various applications in optical clocks and quantum computation based on trapped 171Yb+ ions. Our simulations show that calculated trap depth can reach up to several electronvolts and that the pseudopotential minimum of the trap is located above the trap surface at a distance greater than 80 μm. The described pseudopotential simulations and calculations of different trap parameters can be used to design the planar trap with required parameters. This design could be scaled to store a long chain of ions and used for quantum logic applications as well.

Journal of Experimental and Theoretical Physics LettersJul 31, 20236 citations

Trapping and transforming ions in a surface-electrode chip trap

Ping‐Xing Chen

Bulletin of the American Physical SocietyMar 6, 20180 citations

Surface-electrode ion trap development

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