The increasing complexity of hybrid superconductive computing systems has made interface circuits between logic families an issue of growing importance. In this paper, interface circuits between single flux quantum (SFQ) and directly coupled quantum flux parametron (DQFP) logic families to achieve high speed, low power hybrid superconductive computing systems are presented. In the proposed DQFP-to-SFQ interface, margins greater than$\pm $20% for the critical current of the JJs, bias currents, and inductances are exhibited. The margins of the excitation current of the DQFP buffer are$ - $38% and +35% with the frequency of the excitation current in the range of 2 GHz to 10 GHz. In the proposed SFQ-to-DQFP interface, the margins are greater than$ - $33% and +25%. The margins of the excitation current of the DQFP buffer are$ -$50% and +20% for frequencies ranging from 2 GHz to 10 GHz. Since no transformers are required, the physical area of the adiabatic portion of the interface circuits is significantly less than existing interface circuits. The SFQ-to-DQFP interface circuit operates at frequencies approaching 20 GHz. These interface circuits therefore exhibit high parameter margins and operating frequencies while requiring significantly less area as compared to existing interface circuits. The proposed interface circuits support the use of both ultra-low power and high speed logic families in complex hybrid superconductive systems.The increasing complexity of hybrid superconductive computing systems has made interface circuits between logic families an issue of growing importance. In this paper, interface circuits between single flux quantum (SFQ) and directly coupled quantum flux parametron (DQFP) logic families to achieve high speed, low power hybrid superconductive computing systems are presented. In the proposed DQFP-to-SFQ interface, margins greater than$\pm$20% for the critical current of the JJs, bias currents, and inductances are exhibited. The margins of the excitation current of the DQFP buffer are$-$38% and +35% with the frequency of the excitation current in the range of 2 GHz to 10 GHz. In the proposed SFQ-to-DQFP interface, the margins are greater than$-$33% and +25%. The margins of the excitation current of the DQFP buffer are$-$50% and +20% for frequencies ranging from 2 GHz to 10 GHz. Since no transformers are required, the physical area of the adiabatic portion of the interface circuits is significantly less than existing interface circuits. The SFQ-to-DQFP interface circuit operates at frequencies approaching 20 GHz. These interface circuits therefore exhibit high parameter margins and operating frequencies while requiring significantly less area as compared to existing interface circuits. The proposed interface circuits support the use of both ultra-low power and high speed logic families in complex hybrid superconductive systems.

IEEE Transactions on Applied SuperconductivityApr 5, 20234 citations

An Asynchronous SFQ Logic Circuit

Kazu Ueda, Michitada Morisue, Y. Nishikawa +2 more

Nov 16, 19980 citations

RSFQ interface circuit for the high-frequency signal output

Yoshinobu Tarutani, Kazuo Saitoh, Kazumasa Takagi

Physica C SuperconductivityAug 1, 20011 citation

Design and Demonstration of Directly Coupled Quantum-Flux-Parametron Circuits With Optimized Parameters

Ryohei Ishida, Naoki Takeuchi, Taiki Yamae +1 more

We have been developing the adiabatic quantum-flux-parametron (AQFP), which is an ultra-low-power superconductor logic family. To date, somewhat large AQFP circuits, such as a 4-bit microprocessor and an 8-bit adder, have been demonstrated. To design much larger devices, space-efficient logic circuits are needed. Therefore, in a previous study, we proposed the directly coupled quantum-flux-parametron (DQFP). DQFP circuits propagate data via a direct connection, whereas AQFP circuits propagate data via transformers, which can occupy a large part of the gate area. Thus, DQFP circuits are more space-efficient than AQFP circuits. In this study, we optimized the circuit parameters for DQFP logic cells using numerical simulations from the viewpoint of excitation current margins, component parameter margins, and energy dissipation. We also designed the physical layout of the optimized DQFP cells, fabricated chips, and demonstrated basic DQFP circuits with the optimized cells.We have been developing the adiabatic quantum-flux-parametron (AQFP), which is an ultra-low-power superconductor logic family. To date, somewhat large AQFP circuits, such as a 4-bit microprocessor and an 8-bit adder, have been demonstrated. To design much larger devices, space-efficient logic circuits are needed. Therefore, in a previous study, we proposed the directly coupled quantum-flux-parametron (DQFP). DQFP circuits propagate data via a direct connection, whereas AQFP circuits propagate data via transformers, which can occupy a large part of the gate area. Thus, DQFP circuits are more space-efficient than AQFP circuits. In this study, we optimized the circuit parameters for DQFP logic cells using numerical simulations from the viewpoint of excitation current margins, component parameter margins, and energy dissipation. We also designed the physical layout of the optimized DQFP cells, fabricated chips, and demonstrated basic DQFP circuits with the optimized cells.

IEEE Transactions on Applied SuperconductivityFeb 18, 20217 citations

Study of Signal Interface between Single Flux Quantum Circuit and Adiabatic Quantum Flux Parametron

Fumihiro China, Tatsuya Narama, Naoki Takeuchi +3 more

We investigated interface circuits between a single-flux-quantum (SFQ) circuit and an adiabatic quantum-flux-parametron (AQFP) for their hybrid system. The target frequency of interface circuits is several GHz. The interface circuit that transmits a signal from the SFQ circuit to the AQFP gate (SFQ/AQFP) is realized by combining an SFQ toggle flip-flop (TFF) with the AQFP buffer. The bias margin of the SFQ TFF and the excitation current margin of the SFQ/AQFP interface are 2.47 mV ±24.7% and 1.36 mA ±8.82%, respectively. The interface circuit that transmits a signal from the AQFP to the SFQ circuit (AQFP/SFQ) was designed by using a high-sensitive mutually coupled dc/SFQ converter (MC-dc/SFQ) to detect magnetic flux signal output from the AQFP. The bias margin of the high-sensitive MC-dc/SFQ and the excitation current margin of the AQFP/SFQ are 2.88 mV ±13% and 1.6 mA ±18.8%, respectively. These interface circuits also allow us to use long-distance interconnection based on SFQ passive transmission lines between AQFP gates.We investigated interface circuits between a single-flux-quantum (SFQ) circuit and an adiabatic quantum-flux-parametron (AQFP) for their hybrid system. The target frequency of interface circuits is several GHz. The interface circuit that transmits a signal from the SFQ circuit to the AQFP gate (SFQ/AQFP) is realized by combining an SFQ toggle flip-flop (TFF) with the AQFP buffer. The bias margin of the SFQ TFF and the excitation current margin of the SFQ/AQFP interface are 2.47 mV ±24.7% and 1.36 mA ±8.82%, respectively. The interface circuit that transmits a signal from the AQFP to the SFQ circuit (AQFP/SFQ) was designed by using a high-sensitive mutually coupled dc/SFQ converter (MC-dc/SFQ) to detect magnetic flux signal output from the AQFP. The bias margin of the high-sensitive MC-dc/SFQ and the excitation current margin of the AQFP/SFQ are 2.88 mV ±13% and 1.6 mA ±18.8%, respectively. These interface circuits also allow us to use long-distance interconnection based on SFQ passive transmission lines between AQFP gates.

IEEE International Superconductive Electronics Conference (ISEC)Jul 1, 20150 citations

Fundamental Research Toward SFQ-Integrated Circuits

Akira Fujimaki, Yasutoshi Suzuki, Hiroaki HASEGAWA +2 more

Springer eBooksJan 1, 20000 citations

20% for the critical current of the JJs, bias currents, and inductances are exhibited. The margins of the excitation current of the DQFP buffer are

38% and +35% with the frequency of the excitation current in the range of 2 GHz to 10 GHz. In the proposed SFQ-to-DQFP interface, the margins are greater than

33% and +25%. The margins of the excitation current of the DQFP buffer are

-$50% and +20% for frequencies ranging from 2 GHz to 10 GHz. Since no transformers are required, the physical area of the adiabatic portion of the interface circuits is significantly less than existing interface circuits. The SFQ-to-DQFP interface circuit operates at frequencies approaching 20 GHz. These interface circuits therefore exhibit high parameter margins and operating frequencies while requiring significantly less area as compared to existing interface circuits. The proposed interface circuits support the use of both ultra-low power and high speed logic families in complex hybrid superconductive systems.