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Optical and Quantum Electronics

Optimization and performance investigation of 1-Toffoli gate quantum full adders for spin-torque-based n-qubit architecture

Anant Aravind Kulkarni, Majid Haghparast, Brajesh Kumar Kaushik

Published Nov 23, 2023• 4 citations
Publisher

Abstract

Abstract Quantum computing (QC) is suitable for reversible computing due to its inherent parallel processing ability and fast speed. It also helps to address the issue of high-power dissipation in classical computing. Moreover, QC gates are the sequence of elementary operations such as single-qubit rotation and two-qubit entanglement. Elementary quantum operations are required to be reduced for the realization of complex computing. In this paper, optimization of 1-Toffoli gate-based quantum full adders (QFAs) in terms of the number of elementary operations with the help of quantum library {Ry, Rz, $$\sqrt{\mathrm{SWAP}}$$ SWAP } is carried out. Moreover, the performance of two different 1-Toffoli QFAs is investigated in terms of execution time, fidelity, and number of electrons required to realize the QFAs. Improvement in fidelity is 0.7% and 0.57% for QFA1 and QFA2, respectively, compared to the fidelity of 2-Toffoli QFA. A 9.97% increase in execution time is mandatory for the QFA2 compared to QFA1. The QFA2 takes 5% more number of electrons in comparison to QFA1.

DOI
10.1007/s11082-023-05597-9

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Abstract Quantum computing (QC) is suitable for reversible computing due to its inherent parallel processing ability and fast speed. It also helps to address the issue of high-power dissipation in classical computing. Moreover, QC gates are the sequence of elementary operations such as single-qubit rotation and two-qubit entanglement. Elementary quantum operations are required to be reduced for the realization of complex computing. In this paper, optimization of 1-Toffoli gate-based quantum full adders (QFAs) in terms of the number of elementary operations with the help of quantum library {Ry, Rz, SWAP\sqrt{\mathrm{SWAP}}SWAP​ SWAP } is carried out. Moreover, the performance of two different 1-Toffoli QFAs is investigated in terms of execution time, fidelity, and number of electrons required to realize the QFAs. Improvement in fidelity is 0.7% and 0.57% for QFA1 and QFA2, respectively, compared to the fidelity of 2-Toffoli QFA. A 9.97% increase in execution time is mandatory for the QFA2 compared to QFA1. The QFA2 takes 5% more number of electrons in comparison to QFA1.
The quantum computing (QC) is emerging as one of the possibilities to replace the conventional computing to meet the complex computing challenges. Quantum gates are based on the quantum mechanical phenomena such as superposition and entanglement. Moreover, there are several ways to realize the reversible full adder representing one of the building blocks of the reversible computing. One of the ways to realize the reversible full adder is by using the controlled V and V+ gates. Spintronics is one of the quantum technologies to realize the reversible computing physically. Therefore, there is need of spin-torque based modelling of controlled V and V+ gates for the quantum computing applications in the reversible computing domain. In this paper, the controlled V and V+ gates are modelled for the spin-torque based qubit architecture through the optimization at elementary single-qubit rotation and two-qubit entanglement level. Therefore, the key innovation or unique contribution is to realize the controlled V and V+ gates by using the minimum number of the elementary operations (single- and two-qubits). Moreover, a quantum full adder (QFA) composed of controlled V and V+ gates, is optimized and realized with the spin-torque models of the controlled V and V+ gates to achieve fault tolerant fidelity. Therefore, the novelty is that the optimization of the controlled V and V+ gates for the reversible full adders is carried out by using the identity rules.
Abstract Multi-valued quantum logic circuits possess the ability to store and process more intricate information than binary quantum logic circuits. A key component within numerous intricate computational circuits is the multi-valued quantum adder circuit. The primary objective of this paper is to propose a multi-valued quantum full adder and an optimal replacement of two multi-valued Toffoli gate cascades which can effectively reduce the quantum cost of the circuit. Constructed from multi-valued 1-qudit and 2-qudit M-S gates, this adder circuit is designed by effectively setting the control conditions of multi-valued quantum Toffoli gates. For a quaternary quantum adder based on this M-S gate architecture, the number of QC, 1-qudit gates, and 2-qudit gates are 48.6%, 46.2%, and 54.2%, respectively, of the previous design. Additionally, NCI and NGO are consistent with prior adder. It shows the potential applications of complex quantum reversible logic circuits.
Efficient arithmetic operations are a prerequisite for practical quantum computing. Optimization efforts focus on two primary metrics: Quantum Cost (QC), determined by the number of non-linear gates, and Logical Depth, which defines the execution speed. Existing literature identifies the HNG gate as the standard for Input-Preserving Reversible Full Adders. HNG gate typically requires a QC of 12 and a logical depth of 5, in the area of classical reversible circuits. This paper proposes the PPKN Gate, a novel design that achieves the same inputpreserving functionality using only one Toffoli gate and five CNOT gates. With a Quantum Cost of 10 and a reduced logical depth of 4, the PPKN gate outperforms the standard HNG gate in both complexity and speed. Furthermore, we present a modular architecture for constructing an n-bit Ripple Carry Adder by cascading PPKN modules.
Quantum computing (QC) imitates particle behavior at the sub-atomic level. Quantum gates are based on quantum mechanical phenomena such as superposition and entanglement. The obstacle to the realization of reversible computing is the huge number of operations in terms of quantum gates. Therefore, novel designs of reversible computing blocks with a minimum number of elementary operations with high fidelity are necessary. Therefore, a novel design of multiplexer is proposed in this article, which is composed of only 1-CNOT and 1-Toffoli gates. Moreover, the reduced decomposition of the multiplexer and its identity rule-based optimization for the spin-torque-based n-qubit architecture is discussed. To validate the design, the QISKIT implementation of the novel design in terms of amplitude, probability, and Q-sphere representation is carried out. The results are encouraging to realize the reversible computing involving quantum multiplexer as one of the building blocks.
Addition is a key arithmetic operation in computing, as the rest of arithmetic operations are somewhat based on it. Focusing on quantum computing, addition can be implemented in different ways, such as adapting the ripple-carry adder from classical computing, or using a QFT-based adder, which is more efficient than the former. However, a Toffoli-based adder is in fact an alternative way to optimize QFT-based adders by merging rotation gates into a string of controlled-NOT and Toffoli gates with different control qubits. In this paper, the basics of matrix analysis of quantum circuits are described, which in turn are used to perform a matrix analysis of Toffoli adder circuits.
The minimization of Quantum Cost (QC), specifically the number of Toffoli gates, is a primary objective in the synthesis of reversible arithmetic circuits. For decades, the Peres Full Adder has been considered the benchmark for minimal realizations, requiring 2 Toffoli gates and a Quantum Cost of 12. In this note, we propose a novel reversible Full Adder circuit that utilizes only one Toffoli gate and four CNOT gates. The proposed design achieves a Quantum Cost of 9, representing a 25% reduction compared to the Peres structure, while maintaining a competitive logical depth of 4. We rigorously verify the logic and demonstrate that the reduction is achieved through the automated synthesis framework recently proposed by the authors.