This session focuses on cryo-CMOS ICs for quantum computing. The first paper of the session describes a low-power 260GHz cryo-CMOS backscatter transceiver for communication between 300K to 4K. The following three papers describe cryo-CMOS quantum control ICs for superconducting quantum processors. Next, a cryo-CMOS VCO achieving a state-of-the-art FoM is described.
This session focuses on cryo-CMOS ICs for quantum computing. The first paper of the session describes a low-power 260GHz cryo-CMOS backscatter transceiver for communication between 300K to 4K. The following three papers describe cryo-CMOS quantum control ICs for superconducting quantum processors. Next, a cryo-CMOS VCO achieving a state-of-the-art FoM is described.
Cryogenic CMOS (cryo-CMOS) support of quantum processors is becoming a necessity to ensure the continuous growth of qubit count, so as to achieve scalable, fault-tolerant quantum computers. The first paper of the session describes an integrated controller for spin qubits that performs state manipulation, readout, and gate pulsing fabricated in 22nm FinFET CMOS technology. The second paper presents a fully integrated SoC for spin qubit interface based on RF reflectometry of quantum dots, all implemented in 40nm CMOS technology, for scalable quantum systems operating at 3.5K. The third paper also focuses on scalable RF based readout of spin qubits for a record 0.17mW/qubit power requirement, operating at 4.2K. The fourth paper proposes a 1GS/s A/D converter for low-power digitization of the signal measured from a qubit readout that achieves a FOM of 15fJ/conv.-step at 4K.
Quantum computing holds the potential to solve problems beyond the capabilities of classical computers. However, realizing practical large-scale quantum computers faces critical challenges, including the key bottleneck in wiring quantum processors operating at cryogenic temperatures to their room temperature control electronics. This article explores cryo-CMOS ICs as an enabling technology to circumvent such a wiring bottleneck. After reviewing the basics of quantum computing and the behavior of CMOS devices at cryogenic temperatures, the requirements for the interface electronics for superconducting and semiconductor qubits are discussed, and state-of-the-art cryo-CMOS circuit solutions are briefly described, including a few hints to other qubit platforms. Finally, the article concludes with an overview of future challenges to be addressed to realize the vision of cryo-CMOS technology as an enabler of large-scale quantum computers with practical applications.
To scale up quantum computers to large number of qubits, there is a need to bring the classical interface electronics closer to the qubits operating at milli-Kelvin temperature. This has sparked a recent revival in cryo electronics research. This paper presents a short overview of recent state of the art, shows how nanoscale CMOS transistor properties are conveniently well suited for this task when properly modeled, and discusses a 4K superconducting dispersive readout circuit and a mK RF multiplexer as two examples.
The core of a quantum computer is a quantum processor, which is composed of quantum bits (qubits). Qubits can be implemented in many flavors, but they are fragile, and their state has a tendency to decay in time. To be usable for computation, qubits must be corrected in real time by a classical controller. The controller must also see that desired computations are executed. Today, the control of qubits is performed at room temperature (RT) by racks of instruments, while the qubits operate at several tens of milli-Kelvin. To ensure compactness and, eventually, scalability, we have proposed and implemented CMOS circuits designed to operate at a few degrees Kelvin. This makes complex thermalization circuits unnecessary, potentially enabling superconductive interconnects, which would enable virtually zero resistance and low thermal conductivity. Cryogenic CMOS, or cryo-CMOS, technology was chosen to achieve classical control due to its scalable nature and overall miniaturization opportunities. Cryo-CMOS circuits and systems need to be carefully designed to ensure strict power budgets, while achieving quite advanced specifications in terms of noise and bandwidth. We review the requirements of a classical controller and cryo-CMOS circuits and systems developed for spin qubits in our lab. Results and perspectives are presented with a discussion about a road map for the future.
Quantum computers hold the promise to solve some of the most complex problems of today. The core of a quantum computer is a quantum processor, which is composed of quantum bits (qubits). Qubits are fragile and their state needs to be corrected in real time by a classical controller. Today, the control of qubits is done at room temperature by racks of instruments, while qubits operate at several tens of milli-Kelvin. To ensure compactness, and eventually scalability, we have proposed the use of controllers operating at a few Kelvin, so as to reduce the length of control cables, while potentially enabling superconductive interconnects, which enable virtually zero resistance and low thermal conductivity. We have chosen CMOS to achieve this functionality due to its scalable nature and overall miniaturization opportunities. Cryogenic CMOS, or cryo-CMOS, circuits and systems need to be carefully designed, so as to ensure low noise and high bandwidth, while operating at strict power budgets of a few milliwatts per qubit. In this paper, we outline the requirements of a classical controller and we show examples of such circuits and systems. Results and perspectives are presented discussing a roadmap for the future.
Quantum computers hold the promise to solve some of the most complex problems of today. The core of a quantum computer is a quantum processor, which is composed of quantum bits (qubits). Qubits are fragile and their state needs to be corrected in real time by a classical controller. Today, the control of qubits is done at room temperature by racks of instruments, while qubits operate at several tens of milli-Kelvin. To ensure compactness, and eventually scalability, we have proposed the use of controllers operating at a few Kelvin, so as to reduce the length of control cables, while potentially enabling superconductive interconnects, which enable virtually zero resistance and low thermal conductivity. We have chosen CMOS to achieve this functionality due to its scalable nature and overall miniaturization opportunities. Cryogenic CMOS, or cryo-CMOS, circuits and systems need to be carefully designed, so as to ensure low noise and high bandwidth, while operating at strict power budgets of a few milliwatts per qubit. In this paper, we outline the requirements of a classical controller and we show examples of such circuits and systems. Results and perspectives are presented discussing a roadmap for the future.