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International Conference on Sciences and Techniques of Automatic Control and Computer Engineering

Cryo-CMOS for Scalable Quantum Computing: A Comprehensive Cross-Layer Review

Siwar Mejri, Amel Neifar, Mohamed Slim Masmoudi

Published Dec 20, 2025• 0 citations
Publisher

Abstract

Quantum computing requires scalable, energyefficient control electronics at cryogenic temperatures. Cryogenic CMOS (cryo-CMOS) enables integration with quantum processors, operating below 4 K while leveraging advanced CMOS processes. This paper reviews cryo-CMOS circuits and systems developed from 2016 to 2025, covering device behavior, analog, mixedsignal, and digital circuits, and system-level integration for largescale quantum control. Multiple implementations are compared, highlighting trade-offs in power, noise, scalability, and temperature operation. Key trends include fully integrated Cryo-SoCs, hybrid CMOS-III-V technologies, and machine-learning-assisted calibration. Remaining challenges in modeling, energy dissipation, and thermal management are discussed, outlining a roadmap for nextgeneration cryo-CMOS quantum architectures.

DOI
10.1109/sta66620.2025.11364845

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Quantum computing requires scalable, energyefficient control electronics at cryogenic temperatures. Cryogenic CMOS (cryo-CMOS) enables integration with quantum processors, operating below 4 K while leveraging advanced CMOS processes. This paper reviews cryo-CMOS circuits and systems developed from 2016 to 2025, covering device behavior, analog, mixedsignal, and digital circuits, and system-level integration for largescale quantum control. Multiple implementations are compared, highlighting trade-offs in power, noise, scalability, and temperature operation. Key trends include fully integrated Cryo-SoCs, hybrid CMOS-III-V technologies, and machine-learning-assisted calibration. Remaining challenges in modeling, energy dissipation, and thermal management are discussed, outlining a roadmap for nextgeneration cryo-CMOS quantum architectures.
Quantum computers1 could revolutionize computing in a profound way due to the massive speedup they promise. A quantum computer comprises a cryogenic quantum processor and a classical electronic controller. When scaling up the cryogenic quantum processor to at least a few thousands, and possibly millions, of qubits required for any practical quantum algorithm, cryogenic CMOS (cryo-CMOS) electronics is required to allow feasible and compact interconnections between the controller and the quantum processor. Cryo-CMOS leverages the CMOS fabrication infrastructure while exploiting the continuous improvement of performance and miniaturization guaranteed by Moore's law, in order to enable the fabrication of a cost-effective practical quantum computer. However, designing cryo-CMOS integrated circuits requires a new set of CMOS device models, their embedding in design and verification tools, and the possibility to co-simulate the cryo-CMOS/quantum-processor architecture for full-system optimization. In this paper, we address these challenges by focusing on their impact on the design of complex cryo-CMOS systems.
A systematic research on the development of cryogenic complementary metal-oxide semiconductor (cryo-CMOS) circuits, for implementing the required control electronics to manipulate the quantum bit (qubit) state, is performed over the last few years. Scalability constitutes a key term regarding the evolution of quantum computing from theory to practical application and CMOS technology has been proven to be a promising candidate for implementing the coveted scalable next-generation quantum computers (QCs). Mixed-signal blocks, used for uniting the analog and digital domains, play a key role in the efficient functionality of the qubit control/readout system, thus there is an ever-increasing interest in their high-performance circuit realization. The critical challenge in this venture is to achieve efficient cryogenic operation at low temperatures, i.e., close to the qubit around 4 K, simultaneously keeping power requirements at low values. An overview and comparison of the cryo-CMOS Digital-to-Analog converter (DAC) and Analog-to-Digital converter (ADC) circuit implementations for quantum computing applications that heretofore have been proposed in the literature is presented in this work. A discussion on the challenges and future strategic steps that are henceforth required to proceed toward the development of a functional scalable quantum computer is also conducted.
The core of a quantum computer is a quantum processor, which is composed of quantum bits (qubits). Qubits can be implemented in many flavors, but they are fragile, and their state has a tendency to decay in time. To be usable for computation, qubits must be corrected in real time by a classical controller. The controller must also see that desired computations are executed. Today, the control of qubits is performed at room temperature (RT) by racks of instruments, while the qubits operate at several tens of milli-Kelvin. To ensure compactness and, eventually, scalability, we have proposed and implemented CMOS circuits designed to operate at a few degrees Kelvin. This makes complex thermalization circuits unnecessary, potentially enabling superconductive interconnects, which would enable virtually zero resistance and low thermal conductivity. Cryogenic CMOS, or cryo-CMOS, technology was chosen to achieve classical control due to its scalable nature and overall miniaturization opportunities. Cryo-CMOS circuits and systems need to be carefully designed to ensure strict power budgets, while achieving quite advanced specifications in terms of noise and bandwidth. We review the requirements of a classical controller and cryo-CMOS circuits and systems developed for spin qubits in our lab. Results and perspectives are presented with a discussion about a road map for the future.
Quantum computing holds the potential to solve problems beyond the capabilities of classical computers. However, realizing practical large-scale quantum computers faces critical challenges, including the key bottleneck in wiring quantum processors operating at cryogenic temperatures to their room temperature control electronics. This article explores cryo-CMOS ICs as an enabling technology to circumvent such a wiring bottleneck. After reviewing the basics of quantum computing and the behavior of CMOS devices at cryogenic temperatures, the requirements for the interface electronics for superconducting and semiconductor qubits are discussed, and state-of-the-art cryo-CMOS circuit solutions are briefly described, including a few hints to other qubit platforms. Finally, the article concludes with an overview of future challenges to be addressed to realize the vision of cryo-CMOS technology as an enabler of large-scale quantum computers with practical applications.
Quantum computers hold the promise to solve some of the most complex problems of today. The core of a quantum computer is a quantum processor, which is composed of quantum bits (qubits). Qubits are fragile and their state needs to be corrected in real time by a classical controller. Today, the control of qubits is done at room temperature by racks of instruments, while qubits operate at several tens of milli-Kelvin. To ensure compactness, and eventually scalability, we have proposed the use of controllers operating at a few Kelvin, so as to reduce the length of control cables, while potentially enabling superconductive interconnects, which enable virtually zero resistance and low thermal conductivity. We have chosen CMOS to achieve this functionality due to its scalable nature and overall miniaturization opportunities. Cryogenic CMOS, or cryo-CMOS, circuits and systems need to be carefully designed, so as to ensure low noise and high bandwidth, while operating at strict power budgets of a few milliwatts per qubit. In this paper, we outline the requirements of a classical controller and we show examples of such circuits and systems. Results and perspectives are presented discussing a roadmap for the future.
Quantum computers hold the promise to solve some of the most complex problems of today. The core of a quantum computer is a quantum processor, which is composed of quantum bits (qubits). Qubits are fragile and their state needs to be corrected in real time by a classical controller. Today, the control of qubits is done at room temperature by racks of instruments, while qubits operate at several tens of milli-Kelvin. To ensure compactness, and eventually scalability, we have proposed the use of controllers operating at a few Kelvin, so as to reduce the length of control cables, while potentially enabling superconductive interconnects, which enable virtually zero resistance and low thermal conductivity. We have chosen CMOS to achieve this functionality due to its scalable nature and overall miniaturization opportunities. Cryogenic CMOS, or cryo-CMOS, circuits and systems need to be carefully designed, so as to ensure low noise and high bandwidth, while operating at strict power budgets of a few milliwatts per qubit. In this paper, we outline the requirements of a classical controller and we show examples of such circuits and systems. Results and perspectives are presented discussing a roadmap for the future.