Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

Springer eBooks

Hardware Security of SFQ Circuits

Tahereh Jabbari, Yerzhan Mustafa, Eby G. Friedman, Selçuk Köse

Published Aug 13, 2022• 7 citations
Publisher
DOI
10.1007/978-3-031-15699-1_7

Related papers

Challenges in the Realization of SFQ Digital Circuits

T. Van Duzer

Springer eBooks•Jan 1, 1999•0 citations

Logic Locking in Single Flux Quantum Circuits

Tahereh Jabbari, Gleb Krylov, Eby G. Friedman

The hardware security of RSFQ circuits has become an issue of growing importance for prospective exascale computing systems. Hardware security in RSFQ circuits is particularly relevant to large scale data centers operating with sensitive information. The number of fabrication facilities for superconductive niobium-based technology is limited, and the supply chain for distributing fabricated circuits can be compromised. Logic locking is widely used in modern CMOS circuits to enhance security by masking the functionality of the circuit using a secret key. If an attacker possesses a physical circuit secured by logic locking, the attacker would be unable to determine the intended function. In this paper, a novel methodology for logic locking is proposed for SFQ circuits. Mutual inductances are used to apply additional currents to some or all of the logic gates. These currents behave as keys to access the functionality of the SFQ logic elements. In the proposed technique, only after an additional correct current is applied to all of the locked gates will the circuit produce the proper output. By using inductors with a positive and negative mutual inductance connected to the internal inductances of the gates, the range of current required to unlock a secured circuit is greatly narrowed. In this work, the operation of this proposed logic locking technique is demonstrated using modified SFQ OR gates to enable security while maintaining proper functionality. Less than 4% area overhead is achieved.

IEEE Transactions on Applied Superconductivity•Mar 11, 2021•26 citations

Side-Channel Leakage in SFQ Circuits and Related Attacks on Qubit Control and Readout Systems

Yerzhan Mustafa, Selçuk Köse

Single flux quantum (SFQ) technology is currently used as a cryogenic control and readout circuitry of superconducting quantum computers. The low power operation and high switching frequency of SFQ technology are instrumental to efficiently scale a quantum computer. With the growing interest in the hardware security of SFQ circuits, a novel side-channel leakage mechanism in SFQ-to-dc converters is uncovered in this article. The leakage mechanism is investigated for two logic styles, namely, rapid SFQ (RSFQ) and energy-efficient RSFQ (ERSFQ). By observing the fluctuations in the power supply provided by the room temperature electronics, a malicious adversary can extract critical information about the applied input signals. This type of side-channel leakage can lead to serious security vulnerabilities for superconducting electronics and quantum computers. Two potential side-channel attacks that exploit this vulnerability and target SFQ-based qubit control and readout systems are proposed.

IEEE Transactions on Applied Superconductivity•May 19, 2023•10 citations

Fundamental Research Toward SFQ-Integrated Circuits

Akira Fujimaki, Yasutoshi Suzuki, Hiroaki HASEGAWA +2 more

Springer eBooks•Jan 1, 2000•0 citations

Design and Demonstration of Pipelined Circuits Using SFQ Logic

A. Akahori, Sekiya Akito, Takahiro Yamada +2 more

IEICE Transactions on Electronics•Mar 1, 2002•1 citation

Comparisons of Synchronous-Clocking SFQ Adders

Naofumi Takagi, Masamitsu Tanaka

Recent advances of superconducting single-flux-quantum (SFQ) circuit technology make it attractive to investigate computing systems using SFQ circuits, where arithmetic circuits play important roles. In order to develop excellent SFQ arithmetic circuits, we have to design or select their underlying algorithms, called hardware algorithms, from different point of view than CMOS circuits, because SFQ circuits work by pulse logic while CMOS circuits work by level logic. In this paper, we compare implementations of hardware algorithms for addition by synchronous-clocking SFQ circuits. We show that a set of individual bit-serial adders and Kogge-Stone adder are superior to others.

IEICE Transactions on Electronics•Jan 1, 2010•13 citations
The hardware security of RSFQ circuits has become an issue of growing importance for prospective exascale computing systems. Hardware security in RSFQ circuits is particularly relevant to large scale data centers operating with sensitive information. The number of fabrication facilities for superconductive niobium-based technology is limited, and the supply chain for distributing fabricated circuits can be compromised. Logic locking is widely used in modern CMOS circuits to enhance security by masking the functionality of the circuit using a secret key. If an attacker possesses a physical circuit secured by logic locking, the attacker would be unable to determine the intended function. In this paper, a novel methodology for logic locking is proposed for SFQ circuits. Mutual inductances are used to apply additional currents to some or all of the logic gates. These currents behave as keys to access the functionality of the SFQ logic elements. In the proposed technique, only after an additional correct current is applied to all of the locked gates will the circuit produce the proper output. By using inductors with a positive and negative mutual inductance connected to the internal inductances of the gates, the range of current required to unlock a secured circuit is greatly narrowed. In this work, the operation of this proposed logic locking technique is demonstrated using modified SFQ OR gates to enable security while maintaining proper functionality. Less than 4% area overhead is achieved.
Single flux quantum (SFQ) technology is currently used as a cryogenic control and readout circuitry of superconducting quantum computers. The low power operation and high switching frequency of SFQ technology are instrumental to efficiently scale a quantum computer. With the growing interest in the hardware security of SFQ circuits, a novel side-channel leakage mechanism in SFQ-to-dc converters is uncovered in this article. The leakage mechanism is investigated for two logic styles, namely, rapid SFQ (RSFQ) and energy-efficient RSFQ (ERSFQ). By observing the fluctuations in the power supply provided by the room temperature electronics, a malicious adversary can extract critical information about the applied input signals. This type of side-channel leakage can lead to serious security vulnerabilities for superconducting electronics and quantum computers. Two potential side-channel attacks that exploit this vulnerability and target SFQ-based qubit control and readout systems are proposed.
Recent advances of superconducting single-flux-quantum (SFQ) circuit technology make it attractive to investigate computing systems using SFQ circuits, where arithmetic circuits play important roles. In order to develop excellent SFQ arithmetic circuits, we have to design or select their underlying algorithms, called hardware algorithms, from different point of view than CMOS circuits, because SFQ circuits work by pulse logic while CMOS circuits work by level logic. In this paper, we compare implementations of hardware algorithms for addition by synchronous-clocking SFQ circuits. We show that a set of individual bit-serial adders and Kogge-Stone adder are superior to others.