Superconducting circuits, as used for quantum computing experiments, are commonly interfaced by microwave pulse sequences with gigahertz frequencies. To generate and analyze these pulses, we developed a versatile FPGA-based electronics platform. The modular FPGA firmware guarantees highest accuracy on the nanosecond timescale. More complex data acquisition and control schemes utilize the real-time co-processor of the heterogeneous Multiprocessor System-on-Chip (MPSoC) through an application-specific framework called Taskrunner. The framework complements the FPGA logic with versatile and low-latent control, data aggregation and evaluation capabilities. Within the framework, user tasks are specified conveniently using standard C language and compiled on the fly directly on the MPSoC platform.In this paper, we present the architecture of our Taskrunner software framework. We also provide timing benchmarks and compare execution times of common quantum computing characterization experiments with an FPGA-only approach.
Superconducting circuits, as used for quantum computing experiments, are commonly interfaced by microwave pulse sequences with gigahertz frequencies. To generate and analyze these pulses, we developed a versatile FPGA-based electronics platform. The modular FPGA firmware guarantees highest accuracy on the nanosecond timescale. More complex data acquisition and control schemes utilize the real-time co-processor of the heterogeneous Multiprocessor System-on-Chip (MPSoC) through an application-specific framework called Taskrunner. The framework complements the FPGA logic with versatile and low-latent control, data aggregation and evaluation capabilities. Within the framework, user tasks are specified conveniently using standard C language and compiled on the fly directly on the MPSoC platform.In this paper, we present the architecture of our Taskrunner software framework. We also provide timing benchmarks and compare execution times of common quantum computing characterization experiments with an FPGA-only approach.
Quantum circuits utilizing real time feedback techniques (such as active reset and mid-circuit measurement) are a powerful tool for NISQ-era quantum computing. Such techniques are crucial for implementing error correction protocols, and can reduce the resource requirements of certain quantum algorithms. Realizing these capabilities requires flexible, low-latency classical control. We have developed a custom FPGA-based processor architecture for QubiC, an open source platform for superconducting qubit control. Our architecture is distributed in nature, and consists of a bank of lightweight cores, each configured to control a small (1-3) number of signal generator channels. Each core is capable of executing parameterized control and readout pulses, as well as performing arbitrary control flow based on mid-circuit measurement results. We have also developed a modular compiler stack and domain-specific intermediate representation for programming the processor. Our representation allows users to specify circuits using both gate and pulse-level abstractions, and includes high-level control flow constructs (e.g. if-else blocks and loops). The compiler stack is designed to integrate with quantum software tools and programming languages, such as TrueQ, pyGSTi, and OpenQASM3. In this work, we will detail the design of both the processor and compiler stack, and demonstrate its capabilities with a quantum state teleportation experiment using transmon qubits at the LBNL Advanced Quantum Testbed.
Electronic systems for qubit control and measurement serve as a bridge between quantum programming language and quantum information processors. With the rapid development of superconducting quantum circuit technology, synchronization in a large-scale system, low-latency execution, and low noise are required for electronic systems. Here, we present a field-programmable gate array (FPGA)-based electronic system with a distributed synchronous clock and trigger architecture. The system supports synchronous control of qubits with jitters of ∼5 ps. We implement a real-time digital signal processing system in the FPGA, enabling precise timing control, arbitrary waveform generation, in-phase and quadrature demodulation for qubit state discrimination, and the generation of real-time qubit-state-dependent trigger signals for feedback/feedforward control. The hardware and firmware low-latency design reduces the feedback/feedforward latency of the electronic system to 125 ns, significantly less than the decoherence times of the qubit. Finally, we demonstrate the functionalities and low-noise performance of this system using a fluxonium quantum processor.
This paper reports the development of a low-latency arbitrary waveform generator (AWG), which is suitable for the control and measurement of superconducting quantum computers. It can generate qubit control signals and measurement signals in real time. Compared with commercial AWG, our AWG has less latency and higher analog bandwidth. Compressing latency can reduce system feedback time, and higher analog bandwidth improves the system's integration by mounting more qubits on the readout line. The AWG integrates four high-speed digital-to-analog converters (DACs), phase-locked loop (PLL) circuits, field-programmable gate arrays (FPGAs), and related circuits into a standard PXI 3U board. The waveform generator module, communication interface module, clock module, and configuration module are realized utilizing the FPGA. The FPGA-based hardware architecture enables AWG to be flexibly configured to meet the various needs of quantum experiments. The four-channel AWG has a 2-GSa/s sampling rate, a 14-bit resolution, and 500 MHz bandwidth. The jitter in the AWG output waveform is approximately 3 ps; the latency of the AWG (the time from the feedback trigger received until a feedback pulse is generated) is approximately 55 ns. These designs form the basis of realizing control system for large-scale quantum computing.
This thesis presents the development of a superconducting qubit control and readout system based on FPGA technology, with a focus on the design of a pulse sequencer and the integration of frequency-multiplexed control. The system leverages the Quantum Instrumentation Control Kit (QICK), an open-source Xilinx RFSoC-based platform capable of direct digital synthesis and acquisition of microwave signals up to 10 GHz. The QICK firmware was extended to support the simultaneous generation and readout of multiple frequency-multiplexed tones, enabling the control and measurement of several qubits coupled to a shared feedline. This approach optimizes the number of controllable qubits relative to the available ADC and DAC resources on the RFSoC 4x2 board. Furthermore, this work includes the development of Qubase, a Python-based pulse sequencer that allows users to easily define and execute complex sequences of control and measurement pulses through the QICK Python interface. The resulting architecture is both flexible and scalable, providing a foundation for efficient multi-qubit experiments and enabling advanced techniques such as quantum error correction and real-time feedback.
Quantum computing imposes stringent requirements for the precise control of large-scale qubit systems, including, for example, microsecond-latency feedback and nanosecond-precision timing of gigahertz signals—demands that far exceed the capabilities of conventional real-time systems. The rapidly evolving and highly diverse nature of quantum control necessitates the development of specialized hardware accelerators. While a few custom real-time systems have been developed to meet the tight timing constraints of specific quantum platforms, they face major challenges in scaling and adapting to increasingly complex control demands—largely due to fragmented toolchains and limited support for design automation. To address these limitations, we present RISC-Q—an open-source flexible generator for Quantum Control System-on-Chip (QCSoC) designs, featuring a programming interface compatible with the RISC-V ecosystem. Developed using SpinalHDL, RISC-Q enables efficient automation of highly parameterized and modular QCSoC architectures, supporting agile and iterative development to meet the evolving demands of quantum control. We demonstrate that RISC-Q can replicate the performance of existing QCSoCs with significantly reduced development effort, facilitating efficient exploration of the hardware-software co-design space for rapid prototyping and customization.
Quantum computing requires scalable control hard-ware capable of generating precise signals and synchronizing operations across large numbers of qubits. However, existing control systems are typically optimized for specific qubit modalities, leading to limited interoperability, high development cost, and poor scalability as device architectures evolve. To address this challenge, a heterogeneous and modular control architecture supporting multiple qubit platforms was previously proposed.This paper evaluates FPGA resource requirements and implementation characteristics of the architecture across four controller variants targeting high-frequency microwave, mid-frequency RF, low-frequency DAC, and digital GPIO applications. The results show that core architectural components—including networking, synchronization, and waveform generation—maintain nearly constant hardware usage across platforms, while resource scaling primarily depends on data throughput requirements rather than architectural complexity.Moreover, the architecture is demonstrated on both high-end FPGAs with high-bandwidth memory and cost-efficient embedded devices, confirming portability and deployment flexibility. These findings validate the feasibility of a unified control framework suitable for heterogeneous quantum systems and large-scale control networks.